Bidirectional trench FET with gate-based resurf

A bidirectional trench field effect transistor (FET) device comprising:

• a semiconductor substrate having a topside surface and a backside surface opposite from the topside surface;
• and
• a plurality of transistor structures disposed in the semiconductor substrate, each transistor structure comprising:
• a trench extending vertically from the topside surface;
• a body region adjacent the trench, having a first conductivity type, and in which a channel is formed during operation;
• an upper drift region disposed between the body region and the topside surface and having a second conductivity type;
• a lower drift region disposed between the body region and the backside surface and having the second conductivity type;
• a gate structure disposed in the trench alongside the body region, and configured to receive a control voltage to control formation of the channel during operation;
• a shield disposed in the trench and spaced from the gate structure;
• a gate dielectric layer disposed along a sidewall of the trench between the gate structure and the body region;
• and
• a further dielectric layer disposed along the sidewall between the shield and the lower drift region, the further dielectric layer being thicker than the gate dielectric layer;
• wherein the gate structure has a boundary disposed at a depth between the topside surface and the body region, the depth being substantially spaced from the body region such that the gate structure and the gate dielectric layer are disposed alongside the upper drift region such that electric field magnitudes in the upper drift region are reduced through application of the control voltage, the electric field magnitudes being reduced relative to prospective electric field magnitudes reached in the upper drift region absent the application of the control voltage.

A method of fabricating a device in a semiconductor substrate, the method comprising:

• implanting dopant of a first conductivity type to form a body region buried in the semiconductor substrate, the body region defining a boundary with a drift region disposed between the body region and a surface of the semiconductor substrate;
• forming a trench in the semiconductor substrate that extends vertically from the surface of the semiconductor substrate, the trench being disposed laterally adjacent to the body region and the drift region;
• forming a gate dielectric layer in the trench along a sidewall of the trench;
• and
• forming a gate structure in the trench adjacent the gate dielectric layer and alongside the body region;
• wherein forming the gate structure comprises etching a gate conductive layer to recess the gate structure from the surface of the semiconductor substrate to an extent that the gate structure and the gate dielectric layer have a substantial vertical overlap with the drift region such that electric field magnitudes in the drift region are reduced through application of a control voltage to the gate structure during operation.