Adsorption site blocking method for co-doping ALD films

#The present invention generally relates to the field of dynamic random access memory (DRAM), and more particularly to dielectric material processing for improved DRAM performance.

#Dynamic Random Access Memory utilizes capacitors to store bits of information within an integrated circuit. A capacitor is formed by placing a dielectric material between two electrodes formed from conductive materials. A capacitor's ability to hold electrical charge (i.e., capacitance) is a function of the surface area of the capacitor plates A, the distance between the capacitor plates d (i.e. the physical thickness of the dielectric layer), and the relative dielectric constant or k-value of the dielectric material. The capacitance is given by:

#C = κ ⁢ ⁢ ɛ o ⁢ A d ( Eqn . ⁢ 1 ) where εo represents the vacuum permittivity.

#To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. The drawings are not to scale and the relative dimensions of various elements in the drawings are depicted schematically and not necessarily to scale.

#The techniques of the present invention can readily be understood by considering the following detailed description in conjunction with the accompanying drawings, in which:

#FIG. 1 illustrates a flow chart and a schematic of conventional ALD deposition of doped dielectric materials.

#A detailed description of one or more embodiments is provided below along with accompanying figures. The detailed description is provided in connection with such embodiments, but is not limited to any particular example. The scope is limited only by the claims and numerous alternatives, modifications, and equivalents are encompassed. Numerous specific details are set forth in the following description in order to provide a thorough understanding. These details are provided for the purpose of example and the described techniques may be practiced according to the claims without some or all of these specific details. For the purpose of clarity, technical material that is known in the technical fields related to the embodiments has not been described in detail to avoid unnecessarily obscuring the description.

#In FIGS. 1-3 below, a capacitor stack is illustrated using a simple planar structure. Those skilled in the art will appreciate that the description and teachings to follow can be readily applied to any simple or complex capacitor morphology. The drawings are for illustrative purposes only and do not limit the application of the present invention.

#DRAM MIM capacitors generally comprise a dielectric material disposed between a first electrode layer and a second electrode layer. Those skilled in the art will appreciate that each of the first electrode layer, the dielectric material, and the second electrode layer used in the MIM DRAM capacitor may be formed using any common formation technique such as atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PE-ALD), atomic vapor deposition (AVD), ultraviolet assisted atomic layer deposition (UV-ALD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), or physical vapor deposition (PVD). Generally, because of the complex morphology of the DRAM capacitor structure, ALD, PE-ALD, AVD, or CVD are preferred methods of formation. However, any of these techniques are suitable for forming each of the various layers discussed below. Those skilled in the art will appreciate that the teachings described below are not limited by the technology used for the deposition process.