Non-volatile memory device and production method thereof
AssigneeHitachi, Ltd.
InventorsYoshitaka Sasago, Masaharu Kinoshita, Takahiro Morikawa, Akio Shima, Takashi Kobayashi
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AssigneeHitachi, Ltd.
InventorsYoshitaka Sasago, Masaharu Kinoshita, Takahiro Morikawa, Akio Shima, Takashi Kobayashi
Estimating the term…
A vertical chain memory includes two-layer select transistors having first select transistors which are vertical transistors arranged in a matrix, and second select transistors which are vertical transistors formed on the respective first select transistors, and a plurality of memory cells connected in series on the two-layer select transistors. With this configuration, the adjacent select transistors are prevented from being selected by respective shared gates, the plurality of two-layer select transistors can be selected, independently, and a storage capacity of a non-volatile storage device is prevented from being reduced.
A method of producing a non-volatile storage device, comprising the steps of:
Dependencies are inferred from the claim text.