Thin film transistor array panel and method for manufacturing the same
AssigneeSamsung Display Co., Ltd.
InventorsSang-Uk Lim, Se-Hyoung Cho, Mee-Hye Jung
Life of this patent
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Abstract
A thin film transistor array panel includes a substrate, a gate line extending in a first direction on the substrate, a data line extending in a second direction on the substrate and intersecting the gate line, a thin film transistor connected to the gate line and the data line, an insulating layer on the gate line, the data line, and the thin film transistor, a first auxiliary line on the insulating layer and connected to the gate line, a second auxiliary line on the insulating layer and connected to the data line, and a pixel electrode connected to the thin film transistor.
Claims15
A thin film transistor array panel, comprising:
- a substrate;
- a gate line extending in a first direction on the substrate;
- a data line extending in a second direction on the substrate and intersecting the gate line;
- a thin film transistor connected to the gate line and the data line;
- an insulating layer on the gate line, the data line, and the thin film transistor;
- a first auxiliary line on the insulating layer and connected to the gate line;
- a second auxiliary line on the insulating layer and connected to the data line;
- and a pixel electrode connected to the thin film transistor,
- wherein the first auxiliary line is between pixel electrodes adjacent along the second direction and the second auxiliary line is between pixel electrodes adjacent along the first direction, and
- wherein at least one of the first auxiliary line and the second auxiliary line is disconnected at an intersection of the first auxiliary line and the second auxiliary line in a display area.
A method for manufacturing a thin film transistor array panel, the method comprising:
- forming a gate line extending in a first direction on a substrate;
- forming a data line extending in a second direction on the substrate and intersecting the gate line;
- forming a thin film transistor connected to the gate line and the data line;
- forming an insulating layer on the gate line, the data line, and the thin film transistor;
- forming a first auxiliary line on the insulating layer and connected to the gate line;
- forming a second auxiliary line on the insulating layer and connected to the data line;
- and forming a pixel electrode connected to the thin film transistor,
- wherein the first auxiliary line is between pixel electrodes adjacent along the second direction and the second auxiliary line is between pixel electrodes adjacent along the first direction, and
- wherein at least one of the first auxiliary line and the second auxiliary line is disconnected at an intersection of the first auxiliary line and the second auxiliary line in a display area.
Dependencies are inferred from the claim text.