US 9,177,967 B2 · Heterogeneous semiconductor material integration techniques

Abstract

Techniques are disclosed for heteroepitaxial growth of a layer of lattice-mismatched semiconductor material on an initial substrate, and transfer of a defect-free portion of that layer to a handle wafer or other suitable substrate for integration. In accordance with some embodiments, transfer may result in the presence of island-like oxide structures on the handle wafer/substrate, each having a defect-free island of the lattice-mismatched semiconductor material embedded within its upper surface. Each defect-free semiconductor island may have one or more crystalline faceted edges and, with its accompanying oxide structure, may provide a planar surface for integration. In some cases, a layer of a second, different semiconductor material may be heteroepitaxially grown over the handle wafer/substrate to fill areas around the transferred islands. In some other cases, the handle wafer/substrate itself may be homoepitaxially grown to fill areas around the transferred islands.

Claims25

Dependent claims

An integrated circuit comprising:

a substrate;
an oxide structure formed over a portion of the substrate;
and
a lattice-mismatched semiconductor structure formed entirely on and embedded within an upper surface of the oxide structure beneath it, wherein the lattice-mismatched semiconductor structure includes crystalline faceted edges.

1 more element

A method of forming an integrated circuit, the method comprising:

forming a dielectric layer over a first substrate and patterning one or more openings into the dielectric layer;
forming a first semiconductor layer over the first substrate and patterned dielectric layer, wherein the first semiconductor layer is lattice-mismatched with the first substrate;
planarizing the first semiconductor layer;
forming a first oxide layer over a topography provided by the planarized first semiconductor layer and patterned dielectric layer;
bonding the first oxide layer with a second oxide layer formed over a second substrate;
transferring to the second substrate at least a portion of each of the resultant bonded oxide layer and planarized first semiconductor layer;
planarizing the transferred portions of the bonded oxide layer and first semiconductor layer;
and
etching the resultant planarized bonded oxide layer to expose an upper surface of the underlying second substrate.

6 more elements

Dependencies are inferred from the claim text.

Heterogeneous semiconductor material integration techniques

Life of this patent

Heterogeneous semiconductor material integration techniques

Life of this patent

Abstract

Claims25