Three-dimensional high surface area electrodes
AssigneeCalifornia Institute of Technology
InventorsMuhammad Mujeeb-U-Rahman, Axel Scherer
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Abstract
Three dimensional high surface electrodes are described. The electrodes are fabricated by methods including the steps: designing the pillars; selecting a material for the formation of the pillars; patterning the material; transferring the pattern to form the pillars; insulating the pillars and providing a metal layer for increased conductivity. Alternative methods for fabrication of the electrodes and fabrication of the electrodes using CMOS are also described.
Claims4
A three dimensional high surface electrode comprising at least one pillar between 1 micron and 50 nm tall with a core of silicon or silicon alloy, a complete and uniform layer of insulator between 50 nm and 250 nm, and a complete and uniform layer of conductive metal between 50 nm and 250 nm.
A three dimensional high surface area electrode comprising at least one pillar between 1 micron and 50 nm tall with a core of a CMOS layer and a complete and uniform layer of conductive metal between 50 nm and 250 nm.
Dependencies are inferred from the claim text.