US 9,177,929 B2Granted

Techniques for fabricating fine-pitch micro-bumps

AssigneeNational Center for Advanced Packaging Co., Ltd.

InventorWenqi Zhang

Life of this patent

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Abstract

Techniques for fabricating fine-pitch micro-bumps are disclosed. According to one embodiment, a fabrication process may comprise the following steps: depositing a dielectric layer on a wafer; forming a pattern of through holes in the dielectric layer; depositing a seed metal layer on top of the dielectric layer and inside the through holes; depositing a layer of UBM metal on top of the seed metal layer (including inside the holes), and further filling the holes with a low melting point metal; performing chemical mechanical polishing (CMP) to remove conductive material(s) outside the holes and/or on the surface of the dielectric layer, such that the metal stacks of adjacent holes are insulated by the dielectric material between them; and etching the dielectric material surrounding the holes to cause the tip of the metal stacks to extend slightly higher than the surrounding dielectric surface, thereby forming fine-pitch micro-bumps.

Claims20

Dependent claims

A method for fabricating fine-pitch micro-bumps for semiconductor packaging, the method comprising:

(a) forming a dielectric layer on a wafer;
(b) forming a pattern of holes that extend vertically into said dielectric layer;
(c) depositing a seed metal layer on said dielectric layer and inside said holes;
(d) forming a layer of a first metal on top of said seed metal layer, the first metal partially filling said holes;
(e) forming a layer of a second metal on top of said layer of said first metal, said second metal having a low melting point and at least filling remaining cavity space of said holes, such that said first metal and said second metal form a metal stack in each of said holes wherein, inside each metal stack, said second metal is surround from all sides and the bottom by said first metal;
(f) removing metal materials to expose a top surface of said dielectric layer, such that said metal stack in each of said holes is completely surrounded by said dielectric layer and therefore electrically insulated from every other metal stack;
and
(g) removing at least some of said dielectric layer to cause a top portion of said metal stack in each of said holes to extend higher than the top surface of said dielectric layer.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/276,481Filed 13 May 2014
Priority: CN 2013 1 018660216 May 2013
Published: US 2014/0342545 A120 Nov 2014
Granted: 3 Nov 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification28 codes

H10W 72/012
Manufacture or treatment: of bump connectors, dummy bumps or thermal bumps
H10W 72/20
Interconnections or connectors in packages: bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
H10W 72/01215
Of bump connectors, dummy bumps or thermal bumps: forming coatings
H10W 72/01231
Of bump connectors, dummy bumps or thermal bumps: using blanket deposition