Semiconductor device including contact pads
AssigneeSamsung Electronics Co., Ltd.
InventorsKeun-Nam Kim, Sun-Young Park, Soo-Ho Shin, Kye-Hee Yeom, Hyeon-Woo Jang, Jin-Won Jeong, Chang-Hyun Cho, Hyeong-Sun Hong
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers.
Claims14
A semiconductor device comprising:
- a plurality of bit lines that intersect an active region on a substrate and extend in a first direction;
- a contact pad disposed on the active region between adjacent bit lines among the plurality of bit lines;
- a contact plug disposed on the contact pad between adjacent bit lines among the plurality of bit lines;
- and
- a plurality of spacers disposed on sidewalls of the plurality of bit lines,
- wherein an upper portion of the contact pad is interposed between adjacent spacers among the plurality of spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers among the plurality of spacers.
A semiconductor device comprising:
- a buried insulating layer disposed on a substrate;
- a plurality of bit lines disposed on the buried insulating layer that extend in a first direction, the plurality of bit lines having sidewalls upon which first spacers are disposed;
- a plurality of contact pads interposed in the buried insulating layer between adjacent bit lines among the plurality of bit lines, each of the plurality of contact pads having a width greater than a distance between adjacent first spacers among the plurality of spacers;
- and
- a plurality of contact plugs respectively disposed on the plurality of contact pads between adjacent bit lines among the plurality of bit lines,
- wherein the buried insulating layer includes a first recess that extends in the first direction,
- wherein the plurality of contact pads are in contact with an inner wall of the first recess.
A semiconductor device comprising:
- a buried insulating layer disposed on a substrate;
- a plurality of bit lines disposed on the buried insulating layer that extend in a first direction, the plurality of bit lines having sidewalls upon which first spacers are disposed;
- a plurality of contact pads interposed in the buried insulating layer between adjacent bit lines among the plurality of bit lines, each of the plurality of contact pads having a width greater than a distance between adjacent first spacers;
- and
- a plurality of contact plugs respectively disposed on the plurality of contact pads between adjacent bit lines among the plurality of bit lines,
- wherein an upper portion of a sidewall of at least one of the plurality of contact pads is in contact with a sidewall and bottom surface of a corresponding first spacer.
Dependencies are inferred from the claim text.