Electrically isolated power semiconductor package with optimized layout
AssigneeIXYS Corporation
InventorsThomas Spann, Holger Ostmann, Kang Rim Choi
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AssigneeIXYS Corporation
InventorsThomas Spann, Holger Ostmann, Kang Rim Choi
Estimating the term…
A packaged power semiconductor device is provided with voltage isolation between a metal backside and terminals of the device. The packaged power semiconductor device is arranged in an encapsulant defining a hole for receiving a structure for physically coupling the device to an object. A direct-bonded copper (“DBC”) substrate is used to provide electrical isolation and improved thermal transfer from the device to a heatsink. At least one power semiconductor die is mounted to a first metal layer of the DBC substrate. The first metal layer spreads heat generated by the semiconductor die. In one embodiment, the packaged power semiconductor device conforms to a TO-247 outline and is capable of receiving a screw for physically coupling the device to a heatsink.
A method of manufacturing a packaged power semiconductor device, comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.