Method of forming a semiconductor device employing an optical planarization layer

A method, comprising:

• forming a trench isolation region in a semiconductor layer of a semiconductor substrate, said trench isolation region laterally separating first and second active device areas formed in said semiconductor layer;
• forming a gate structure of a transistor above said second active device area, said gate structure comprising a gate dielectric layer, a gate electrode formed above said gate dielectric layer, and a dielectric cap layer formed above said gate electrode;
• conformally depositing a sacrificial dielectric layer above said first and second active device areas, said sacrificial dielectric layer covering sidewalls of said gate structure and an upper surface of said dielectric cap layer;
• forming an optical planarization layer above said sacrificial dielectric layer, said optical planarization layer covering said first and second active device areas;
• forming a patterned mask layer above said optical planarization layer, said patterned mask layer covering said optical planarization layer formed above said first active device area and exposing at least a portion of said optical planarization layer formed above said second active device area;
• performing an etch-back process on said exposed portion of said optical planarization layer in the presence of said patterned mask layer to expose a portion of said sacrificial oxide layer formed above said gate structure;
• and
• after performing said etch-back process, completely removing said sacrificial dielectric layer from above said first and second active device areas.