Barrier layer stack for bit line air gap formation
AssigneeSanDisk Technologies LLC
InventorsTakuya Futase, Katsuo Yamada, Tomoyasu Kakegawa, Noritaka Fukuo, Yuji Takahashi
Life of this patent
Estimating the term…
Abstract
Air gaps are formed between conductive metal lines that have an inner barrier layer and an outer barrier layer. An etch step to remove sacrificial material is performed under a first set of process conditions producing a byproduct that suppresses further etching. A byproduct removal step performed under a second set of process conditions removes the byproduct.
Claims20
A method of forming an air gap between adjacent conductive lines comprising:
- forming a plurality of trenches in a dielectric layer that is formed of a dielectric material;
- subsequently forming a first barrier layer in the plurality of trenches;
- subsequently forming a second barrier layer over the first barrier layer;
- and
- subsequently filling the plurality of trenches with a conductive metal to form bit lines;
- subsequently removing dielectric material between bit lines by:
- (a) performing a Chemical Dry Etching (CDE) step
- under a first set of process conditions
- thereby substantially etching the dielectric material and the second barrier layer simultaneously
- without substantially etching the first barrier layer such that the first barrier layer extends above the dielectric material and second barrier layer,
- the etching of the dielectric material under the first set of process conditions
- producing a byproduct that suppresses the etching of the dielectric material;
- and
- (b) subsequently performing a removal step
- to remove the byproduct of the etching of the dielectric material in the CDE step
- under a second set of process conditions.
A method of forming air gaps between bit lines comprising:
- (a) forming a plurality of bit lines
- in a dielectric material,
- an individual bit line having
- an inner barrier layer and
- an outer barrier layer;
- (b) subsequently etching the dielectric material using an etch step
- that etches the inner barrier layer,
- does not significantly etch the outer barrier layer, and
- etches the dielectric material
- to produce a byproduct that suppresses further etching,
- wherein the inner barrier layer and dielectric material are etched simultaneously such that the outer barrier layer extends above the inner barrier layer and the dielectric material;
- (c) subsequently removing the byproduct using a removal step
- that removes substantially all of the byproduct from over the dielectric material between bit lines and
- leaves at least some of the byproduct on surfaces of the inner barrier layer;
- and
- (d) repeating steps (b) and (c) until a predetermined amount of the dielectric material is removed.
A method of forming air gaps between bit lines comprising:
- (a) forming a plurality of bit lines
- in a sacrificial layer of silicon oxide,
- an individual bit line having
- an inner barrier layer of titanium and
- an outer barrier layer of titanium nitride;
- (b) subsequently etching the silicon oxide using an etch step
- that etches the titanium of the inner barrier layer,
- does not significantly etch the titanium nitride of the outer barrier layer, and
- etches the silicon oxide
- to produce a byproduct containing ammonium fluorosilicate ((NH4SiF6) that suppresses further etching,
- wherein the titanium and silicon oxide are etched simultaneously such that the outer barrier layer extends above the inner barrier layer and the sacrificial layer;
- (c) subsequently removing the byproduct using a removal step
- that removes substantially all of the byproduct from over the silicon oxide between bit lines and
- leaves at least some of the byproduct on surfaces of the inner barrier layer;
- and
- (d) repeating steps (b) and (c) until a predetermined amount of the silicon oxide is removed.
Dependencies are inferred from the claim text.