Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsTokumasa Hara, Naoya Tokiwa, Hiroshi Sukegawa, Hitoshi Iwai, Toshifumi Shano, Shirou Fujita
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Abstract
According to one embodiment, a semiconductor memory device reads data in units of page. The device includes: a memory cell array; a plurality of latch circuits; and an arithmetic operation circuit. The memory cell array holds data multiplexed in at least three pages. The latch circuits read and hold the multiplexed data at a startup. The arithmetic operation circuit performs operations by use of the multiplexed data.
Claims23
A semiconductor memory device reading data in units of page, the device comprising:
- a memory cell array configured to hold data multiplexed in at least three pages;
- a plurality of latch circuits configured to read and hold the multiplexed data at a startup;
- and
- an arithmetic operation circuit configured to perform operations by use of the multiplexed data.
A method for reading data from a semiconductor memory device which stores data multiplexed in a plurality of pages, the method comprising:
- reading first data of the multiplexed data from a first page at a startup;
- reading second data of the multiplexed data from a second page after the first data is read;
- reading third data of the multiplexed data from a third page after the second data is read;
- and
- performing an operation by use of the first to third data to determine contents of the multiplexed data.
Dependencies are inferred from the claim text.