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US 9,177,657 B2Granted
Semiconductor device having non-volatile memory with data erase scheme
AssigneeRenesas Electronics Corporation
InventorsTomoya Ogawa, Takashi Ito, Mitsuhiro Tomoeda
Life of this patent
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Abstract
In a nonvolatile memory device (4) provided in a semiconductor device, when data is erased based on a band-to-band tunneling scheme, supply of a boosted voltage to a memory cell (MC) to be erased is ended when a condition that an output voltage (VUCP) of a charge pump circuit (52) has recovered to a predetermined reference voltage is satisfied and additionally a condition that a predetermined reference time has elapsed since start of supply of the boosted voltage (VUCP) to the memory cell (MC) to be erased is satisfied.
Claims10
A semiconductor device comprising:
- a memory cell transistor having a charge storage portion and storing data based on a change of a threshold voltage depending on an amount of charge in said charge storage portion;
- a voltage generation unit generating a boosted voltage to be supplied to one main electrode of said memory cell transistor in an erase operation based on a band-to-band tunneling scheme;
- a detection unit detecting an output voltage of said voltage generation unit and comparing the output voltage with a reference value;
- and
- a control unit controlling a timing at which said boosted voltage is supplied in said erase operation,
- said control unit ending supply of said boosted voltage when a predetermined first reference time has elapsed since start of supply of said boosted voltage and a result of detection and comparison by said detection unit indicates that said boosted voltage has become equal to or more than said reference value.
3 more elements
A semiconductor device comprising:
- a plurality of memory cell transistors each having a charge storage portion and storing data based on a change of a threshold voltage depending on an amount of charge in said charge storage portion,
- said plurality of memory cell transistors being divided into n groups, transistors belonging to the same group each having one main electrode connected to a common line;
- a voltage generation unit generating a boosted voltage to be supplied to said common line of each said group in an erase operation based on a band-to-band tunneling scheme;
- a detection unit detecting an output voltage of said voltage generation unit and comparing the output voltage with a reference value;
- and
- a control unit controlling a timing at which said boosted voltage is supplied in said erase operation,
- said control unit starting supply of said boosted voltage to an (i+1)-th group (1≦i≦n−1) when a predetermined first reference time has elapsed since start of supply of said boosted voltage to an i-th group and a result of detection and comparison by said detection unit indicates that said boosted voltage has become equal to or more than said reference value.
4 more elements
A semiconductor device comprising:
- a plurality of memory cell transistors each having a charge storage portion and storing data based on a change of a threshold voltage depending on an amount of charge in said charge storage portion,
- said plurality of memory cell transistors being divided into n groups, transistors belonging to the same group each having one main electrode connected to a common line;
- a voltage generation unit generating a boosted voltage to be supplied to said common line of each said group in an erase operation based on a band-to-band tunneling scheme;
- a detection unit detecting an output current of said voltage generation unit and comparing the output current with a reference value;
- and
- a control unit controlling a timing at which said boosted voltage is supplied in said erase operation,
- said control unit starting supply of said boosted voltage to an (i+1)-th group (1≦i≦n−1) when a predetermined first reference time has elapsed since start of supply of said boosted voltage to an i-th group and a result of detection and comparison by said detection unit indicates that said output current has become equal to or less than said reference value.
4 more elements
Dependencies are inferred from the claim text.