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US 9,177,656 B2Granted
Data writing method, memory storage device and memory controlling circuit unit
AssigneePhison Electronics Corp.
InventorChih-Kang Yeh
Life of this patent
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Abstract
The writing method includes: grouping logical erasing units into a first region and an second region; determining if a first logical erasing unit which a host system intends to write belongs to the first region or the second region; if the first logical erasing unit belongs to the first region, writing data to a spare physical programming unit, wherein the physical erasing unit to which the spare physical programming belongs further stores data belonging to another logical erasing unit; if the first logical erasing unit belongs to the second region, writing data to a physical erasing unit in which all the valid data belong to the first logical erasing unit. Accordingly, a speed of sequential writing is guaranteed to be greater than a target value.
Claims21
A data writing method, for a rewritable non-volatile memory module which comprises a plurality of physical erasing units each comprising a plurality of physical programming units, the data writing method comprising:
- configuring a plurality of logical addresses, wherein the logical addresses constitute a plurality of logical programming units and the logical programming units constitute a plurality of logical erasing units;
- grouping the logical erasing units into a first region and a second region;
- receiving a write command from a host system, wherein the write command instructs to write first data to at least one first logical address of the logical addresses and the at least one first logical address belongs to a first logical erasing unit of the logical erasing units;
- determining whether the first logical erasing unit belongs to the first region or the second region;
- executing a first writing procedure if the first logical erasing unit belongs to the first region, wherein the first writing procedure comprises:
- selecting a spare physical programming unit from the physical programming units;
- and
- writing the first data to the spare physical programming unit, wherein the spare physical programming unit belongs to a first physical erasing unit of the physical erasing units and the first physical erasing unit further stores data belonging to a second logical erasing unit of the logical erasing units, and the second logical erasing unit is different from the first logical erasing unit,
- executing a second writing procedure if the first logical erasing unit belongs to the second region, wherein the second writing procedure comprises:
- selecting a second physical erasing unit from the physical erasing units;
- and
- writing the first data to the second physical erasing unit, wherein all valid data in the second physical erasing unit belongs to the first logical erasing unit.
9 more elements
A memory storage device, comprising:
- a connection interface unit coupled to a host system;
- a rewritable non-volatile memory module comprising a plurality of physical erasing units each comprising a plurality of physical programming units;
- and
- a memory controlling circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module and configured to configure a plurality of logical addresses, wherein the logical addresses constitute a plurality of logical programming units and the logical programming units constitute a plurality of logical erasing units,
- wherein the memory controlling circuit unit is configured to group the logical erasing units to a first region and a second region and receive a write command from the host system, wherein the write command instructs to write first data to at least one first logical address of the logical addresses and the at least one first logical address belongs to a first logical erasing unit of the logical erasing units,
- wherein the memory controlling circuit unit is configured to determine whether the first logical erasing unit belongs to the first region or the second region,
- if the first logical erasing unit belongs to the first region, the memory controlling circuit unit is configured to select a spare physical programming unit from the physical programming units and write the first data to the spare physical programming unit, wherein the spare physical programming unit belongs to a first physical erasing unit of the physical erasing units and the first physical erasing unit further stores data belonging to a second logical erasing unit of the logical erasing units, and the second logical erasing unit is different from the first logical erasing unit, and
- if the first logical erasing unit belongs to the second region, the memory controlling circuit unit is configured to select a second physical erasing unit from the physical erasing units and write the first data to the second physical erasing unit, wherein all valid data in the second physical erasing unit belongs to the first logical erasing unit.
5 more elements
A memory controlling circuit unit, for controlling a rewritable non-volatile memory module which comprises a plurality of physical erasing units each comprising a plurality of physical programming units, the memory controlling circuit unit comprising:
- a host interface coupled to a host system;
- a memory interface coupled to the rewritable non-volatile memory module;
- and
- a memory management circuit coupled to the host interface and the memory interface and configured to configure a plurality of logical addresses, wherein the logical addresses constitute a plurality of logical programming units and the logical programming units constitute a plurality of logical erasing units,
- wherein the memory management circuit is configured to group the logical erasing units to a first region and a second region and receive a write command from the host system, wherein the write command instructs to write first data to at least one first logical address of the logical addresses and the at least one first logical address belongs to a first logical erasing unit of the logical erasing units,
- wherein the memory management circuit is configured to determine whether the first logical erasing unit belongs to the first region or the second region,
- if the first logical erasing unit belongs to the first region, the memory management circuit is configured to select a spare physical programming unit from the physical programming units and write the first data to the spare physical programming unit, wherein the spare physical programming unit belongs to a first physical erasing unit of the physical erasing units and the first physical erasing unit further stores data belonging to a second logical erasing unit of the logical erasing units, and the second logical erasing unit is different from the first logical erasing unit, and
- if the first logical erasing unit belongs to the second region, the memory management circuit is configured to select a second physical erasing unit from the physical erasing units and write the first data to the second physical erasing unit, wherein all valid data in the second physical erasing unit belongs to the first logical erasing unit.
5 more elements
Dependencies are inferred from the claim text.