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US 9,177,618 B2Granted
Semiconductor memory apparatus
AssigneeSK hynix Inc.
InventorKhil Ohk Kang
Life of this patent
Estimating the term…
Abstract
A semiconductor memory apparatus includes a bank; a temperature sensor configured to generate a temperature voltage of which voltage level is changed according to a temperature variation of the bank; and a timing control block configured to control a timing of a signal to be inputted to the bank, according to the voltage level of the temperature voltage.
Claims18
A semiconductor memory apparatus comprising:
- a bank;
- a temperature sensor configured to generate a temperature voltage of which voltage level is changed according to a temperature variation of the bank;
- and
- a timing control block configured to control a timing of a signal to be inputted to the bank, according to the voltage level of the temperature voltage;
- wherein the temperature sensor generates the temperature voltage of which voltage level rises as a temperature of the bank rises;
- and
- wherein the timing control block determines whether to delay the signal to be inputted to the bank, according to the voltage level of the temperature voltage.
4 more elements
A semiconductor memory apparatus comprising:
- a first bank operating in response to a first command signal;
- a second bank operating in response to a second command signal;
- a first temperature sensor configured to generate a first temperature voltage according to a temperature variation of the first bank;
- a second temperature sensor configured to generate a second temperature voltage according to a temperature variation of the second bank;
- a signal transfer block configured to output an internal command signal as a first preliminary command signal or a second preliminary command signal in response to a bank select signal;
- and
- a timing control block configured to delay the first and second preliminary command signals according to voltage levels of the first and second temperature voltages, and output the first and second command signals.
4 more elements
A semiconductor memory system comprising:
- a signal transfer block configured to output an internal command signal in response to a level of a bank select signal;
- a timing control block configured to delay a command signal to be inputted to a bank according to a temperature voltage, and output the command signal;
- the bank configured to operate in response to the command signal;
- and
- a temperature sensor configured to generate a temperature voltage according to a temperature variation of the bank.
2 more elements
Dependencies are inferred from the claim text.