Liquid crystal display device, driving device for liquid crystal display panel, and liquid crystal display panel

A liquid crystal display device comprising:

• an active matrix liquid crystal display panel;
• and
• a driving device for driving the liquid crystal display panel, wherein
• the liquid crystal display panel comprises:
• a common electrode;
• a plurality of pixel electrodes arranged in a matrix;
• and
• source lines provided on a left side of pixel electrodes in each column of pixel electrodes and on a right side of a rightmost column of pixel electrodes,
• wherein when every row or every two or more consecutive rows of pixel electrodes are set as one group, a pixel electrode in each row of an odd-numbered group is connected to a source line on a predetermined side among source lines existing on both sides of the pixel electrode, and a pixel electrode in each row of an even-numbered group is connected to a source line on a side opposite to the predetermined side among the source lines existing on both sides of the pixel electrode;
• the driving device comprises:
• a DA converter for inputting each data corresponding to each of pixel values for one row, converting the input data to an analog voltage, and outputting a potential after subjected to conversion, wherein depending on whether a first control signal input to the DA converter is at high level or low level, the DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered potential output terminal from the left and a potential lower than the common electrode potential is output from an even-numbered potential output terminal from the left, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal from the left and a potential higher than the common electrode potential is output from the even-numbered potential output terminal from the left;
• and
• switch means for switching between whether a potential of a pixel electrode is set using the source line on the left side of the pixel electrode and whether the potential of the pixel electrode is set using the source line on the right side of the pixel electrode, wherein if the number of pixel columns to be driven is denoted as m, the switch means has m input terminals and m+1 switch output terminals, and if a k-th input terminal from the left is denoted as Ik, k-th and k+1-th switch output terminals from the left are denoted as Ok and Ok+1, respectively, and k takes each value from 1to m, the switch means switches, depending on whether a second control signal input to the switch means is at high level or low level, between whether the input terminal Ik is connected to the switch output terminal Ok and whether the input terminal Ik is connected to the switch output terminal Ok+1;
• wherein
• two or more driving devices are provided, and
• among adjacent two driving devices, a rightmost potential output terminal of a left-hand driving device and a leftmost potential output terminal of a right-hand driving device are connected to a common source line.

A liquid crystal display device comprising

• an active matrix liquid crystal display panel;
• and
• a driving device for driving the liquid crystal display panel, wherein
• the liquid crystal display panel comprises:
• a common electrode;
• a plurality of pixel electrodes arranged in a matrix;
• and
• source lines provided on a left side of pixel electrodes in each column of pixel electrodes and on a right side of a rightmost column of pixel electrodes,
• wherein when every row or every two or more consecutive rows of pixel electrodes are set as one group, a pixel electrode in each row of an odd-numbered group is connected to a source line on a predetermined side among source lines existing on both sides of the pixel electrode, and a pixel electrode in each row of an even-numbered group is connected to a source line on a side opposite to the predetermined side among the source lines existing on both sides of the pixel electrode;
• the driving device comprises:
• a DA converter for inputting each data corresponding to each of pixel values for one row, converting the input data to an analog voltage, and outputting a potential after subjected to conversion, wherein depending on whether a first control signal input to the DA converter is at high level or low level, the DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered potential output terminal from the left and a potential lower than the common electrode potential is output from an even-numbered potential output terminal from the left, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal from the left and a potential higher than the common electrode potential is output from the even-numbered potential output terminal from the left;
• and
• switch means for switching between whether a potential of a pixel electrode is set using the source line on the left side of the pixel electrode and whether the potential of the pixel electrode is set using the source line on the right side of the pixel electrode, wherein if the number of pixel columns to be driven is denoted as m, the switch means has m input terminals and m+1 switch output terminals, and if a k-th input terminal from the left is denoted as Ik, k-th and k+1-th switch output terminals from the left are denoted as Ok and Ok+1, respectively, and k takes each value from 1 to m, the switch means switches, depending on whether a second control signal input to the switch means is at high level or low level, between whether the input terminal Ik is connected to the switch output terminal Ok and whether the input terminal Ik is connected to the switch output terminal Ok+1;
• further comprising:
• first latch means for reading and holding R, G and B pixel values each for one pixel simultaneously;
• a shift register for outputting a data reading instruction signal sequentially to instruct the first latch means to read each of the R, G and B pixel values each for one pixel;
• second latch means for reading pixel values of m pixels for one row collectively from the first latch means, and outputting data corresponding to each pixel value;
• level shifting means having m+1 data input terminals and m+1 data output terminals and configured to shift levels of data input from the data input terminals and output the data from the data output terminals;
• and
• a voltage follower having m+1 potential input terminals and m+1 potential output terminals, and configured to output, from the potential output terminals, potentials equal to potentials input from the potential input terminals,
• wherein the second latch means has m data output terminals for outputting data corresponding to the pixel values of m pixels for one row,
• the DA converter has m+1 data input terminals and m+1 potential output terminals,
• the data output terminals of the second latch means are connected to the input terminals of the switch means in a one-to-one relationship,
• the switch output terminals of the switch means are connected to the data input terminals of the level shifting means in a one-to-one relationship,
• the data output terminals of the level shifting means are connected to the data input terminals of the DA converter in a one-to-one relationship,
• the potential output terminals of the DA converter are connected to the potential input terminals of the voltage follower in a one-to-one relationship,
• the potential output terminals of the voltage follower are connected to the source lines of the liquid crystal display panel,
• the level of the first control signal is switched alternately on a frame-by-frame basis, and
• the level of the second control signal is switched alternately each time all rows belonging to a group are selected.

A liquid crystal display device comprising:

• an active matrix liquid crystal display panel;
• and
• a driving device for driving the liquid crystal display panel, wherein
• the liquid crystal display panel comprises:
• a common electrode;
• a plurality of pixel electrodes arranged in a matrix;
• and
• source lines provided on a left side of pixel electrodes in each column of pixel electrodes and on a right side of a rightmost column of pixel electrodes,
• wherein when every row or every two or more consecutive rows of pixel electrodes are set as one group, a pixel electrode in each row of an odd-numbered group is connected to a source line on a predetermined side among source lines existing on both sides of the pixel electrode, and a pixel electrode in each row of an even-numbered group is connected to a source line on a side opposite to the predetermined side among the source lines existing on both sides of the pixel electrode;
• the driving device comprises:
• a DA converter for inputting each data corresponding to each of pixel values for one row, converting the input data to an analog voltage, and outputting a potential after subjected to conversion, wherein depending on whether a first control signal input to the DA converter is at high level or low level, the DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered potential output terminal from the left and a potential lower than the common electrode potential is output from an even-numbered potential output terminal from the left, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal from the left and a potential higher than the common electrode potential is output from the even-numbered potential output terminal from the left;
• and
• switch means for switching between whether a potential of a pixel electrode is set using the source line on the left side of the pixel electrode and whether the potential of the pixel electrode is set using the source line on the right side of the pixel electrode, wherein if the number of pixel columns to be driven is denoted as m, the switch means has m input terminals and m+1 switch output terminals, and if a k-th input terminal from the left is denoted as Ik, k-th and k+1-th switch output terminals from the left are denoted as Ok and Ok+1, respectively, and k takes each value from 1 to m, the switch means switches, depending on whether a second control signal input to the switch means is at high level or low level, between whether the input terminal Ik is connected to the switch output terminal Ok and whether the input terminal Ik is connected to the switch output terminal Ok+1;
• the liquid crystal display device further comprising:
• first latch means for reading and holding R, G and B pixel values each for one pixel simultaneously;
• a shift register for outputting a data reading instruction signal sequentially to instruct the first latch means to read each of the R, G and B pixel values each for one pixel;
• second latch means for reading pixel values of m pixels for one row collectively from the first latch means, and outputting data corresponding to each pixel value;
• level shifting means having m+1 data input terminals and m+1 data output terminals and configured to shift levels of data input from the data input terminals and output the data from the data output terminals;
• and
• a voltage follower having m+1 potential input terminals and m+1 potential output terminals, and configured to output, from the potential output terminals, potentials equal to potentials input from the potential input terminals,
• wherein the first latch means has m pixel value output terminals for causing the second latch means to read the pixel values,
• the second latch means has m+1 data reading terminals for reading the pixel values from the first latch means, and m+1 data output terminals for outputting data corresponding to the pixel values of pixels for one row,
• the DA converter has m+1 data input terminals and m+1 potential output terminals,
• the pixel value output terminals of the first latch means are connected to the input terminals of the switch means in a one-to-one relationship,
• the switch output terminals of the switch means are connected to the data reading terminals of the second latch means in a one-to-one relationship,
• the data output terminals of the second latch means are connected to the data input terminals of the level shifting means in a one-to-one relationship,
• the data output terminals of the level shifting means are connected to the data input terminals of the DA converter in a one-to-one relationship,
• the potential output terminals of the DA converter are connected to the potential input terminals of the voltage follower in a one-to-one relationship,
• the potential output terminals of the voltage follower are connected to the source lines of the liquid crystal display panel,
• the level of the first control signal is switched alternately on a frame-by-frame basis, and
• the level of the second control signal is switched alternately each time all rows belonging to a group are selected.

A liquid crystal display device comprising:

• an active matrix liquid crystal display panel;
• and
• a driving device for driving the liquid crystal display panel, wherein
• the liquid crystal display panel comprises:
• a common electrode;
• a plurality of pixel electrodes arranged in a matrix;
• and
• source lines provided on a left side of pixel electrodes in each column of pixel electrodes and on a right side of a rightmost column of pixel electrodes,
• wherein when every row or every two or more consecutive rows of pixel electrodes are set as one group, a pixel electrode in each row of an odd-numbered group is connected to a source line on a predetermined side among source lines existing on both sides of the pixel electrode, and a pixel electrode in each row of an even-numbered group is connected to a source line on a side opposite to the predetermined side among the source lines existing on both sides of the pixel electrode;
• the driving device comprises:
• a DA converter for inputting each data corresponding to each of pixel values for one row, converting the input data to an analog voltage, and outputting a potential after subjected to conversion, wherein depending on whether a first control signal input to the DA converter is at high level or low level, the DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered potential output terminal from the left and a potential lower than the common electrode potential is output from an even-numbered potential output terminal from the left, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal from the left and a potential higher than the common electrode potential is output from the even-numbered potential output terminal from the left;
• and
• switch means for switching between whether a potential of a pixel electrode is set using the source line on the left side of the pixel electrode and whether the potential of the pixel electrode is set using the source line on the right side of the pixel electrode, wherein if the number of pixel columns to be driven is denoted as m, the switch means has m input terminals and m+1 switch output terminals, and if a k-th input terminal from the left is denoted as Ik, k-th and k+1-th switch output terminals from the left are denoted as Ok and Ok+1, respectively, and k takes each value from 1 to m, the switch means switches, depending on whether a second control signal input to the switch means is at high level or low level, between whether the input terminal Ik is connected to the switch output terminal Ok and whether the input terminal Ik is connected to the switch output terminal Ok+1;
• wherein
• the number of columns of pixels to be driven is a multiple of 3, and
• the liquid crystal display device further comprises:
• first latch means in which m+1 latch circuits are arranged, each latch circuit having an input terminal for a data reading instruction signal to give an instruction to read a pixel value, a pixel value reading terminal for reading a pixel value for one pixel input when the data reading instruction signal is input to the input terminal, and an output terminal for the pixel value;
• a shift register having signal output terminals for a m/3 piece of data reading instruction signal and configured to output the data reading instruction signal sequentially from each of the signal output terminals;
• output of shift register switching means which, if an i-th signal output terminal from the left in the shift register is denoted as Ci and i takes each value from 1 to m/3, connects the signal output terminal Ci with input terminals of 3·i−2-th, 3·i−1-th and 3·i-th latch circuits of the first latch means when the second control signal is at high level, or connects the signal output terminal Ci with input terminals of 3·i−1-th, 3·i-th and 3·i+1-th latch circuits of the first latch means when the second control signal is at low level;
• second latch means for reading pixel values of m pixels for one row collectively from the first latch means, and outputting data corresponding to each pixel value;
• level shifting means having m+1 data input terminals and m+1 data output terminals and configured to shift levels of data input from the data input terminals and output the data from the data output terminals;
• and
• a voltage follower having m+1 potential input terminals and m+1 potential output terminals and configured to output, from the potential output terminals, potentials equal to potentials input from the potential input terminals,
• wherein the m input terminals of the switch means are connected to data wiring for transferring pixel values for R, data wiring for transferring pixel values for G and data wiring for transferring pixel values for B,
• the switch output terminals of the switch means are connected to the pixel value reading terminals of the respective latch circuits in the first latch means in a one-to-one relationship,
• the second latch means has m+1 data reading terminals for reading pixel values from the first latch means and m+1 data output terminals for outputting data corresponding to pixel values of pixels for one row,
• DA converter has m+1 data input terminals and m+1 potential output terminals,
• the output terminals of the respective latch circuits in the first latch means are connected to the data reading terminals of the second latch means in a one-to-one relationship,
• the data output terminals of the second latch means are connected to the data input terminals of the level shifting means in a one-to-one relationship,
• the data output terminals of the level shifting means are connected to the data input terminals of the DA converter in a one-to-one relationship,
• the potential output terminals of the DA converter are connected to the potential input terminals of the voltage follower in a one-to-one relationship,
• the potential output terminals of the voltage follower are connected to the source lines of the liquid crystal display panel,
• the level of the first control signal is switched alternately on a frame-by-frame basis,
• the level of the second control signal is switched alternately each time all rows belonging to a group are selected after the second control signal is set to high level upon starting a frame, and
• the output of shift register switching means and the switch means maintain a state equal to that when the second control signal is at high level until the second control signal is generated in a first frame after power-on.

A liquid crystal display device comprising:

• an active matrix liquid crystal display panel;
• and
• a driving device for driving the liquid crystal display panel, wherein the liquid crystal display panel comprises:
• a common electrode;
• a plurality of pixel electrodes arranged in a matrix;
• and
• source lines provided on a left side of pixel electrodes in each column of pixel electrodes and on a right side of a rightmost column of pixel electrodes,
• wherein when every row or every two or more consecutive rows of pixel electrodes are set as one group, a pixel electrode in each row of an odd-numbered group is connected to a source line on a predetermined side among source lines existing on both sides of the pixel electrode, and a pixel electrode in each row of an even-numbered group is connected to a source line on a side opposite to the predetermined side among the source lines existing on both sides of the pixel electrode;
• the driving device comprises:
• a DA converter for inputting each data corresponding to each of pixel values for one row, converting the input data to an analog voltage, and outputting a potential after subjected to conversion, wherein depending on whether a first control signal input to the DA converter is at high level or low level, the DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered potential output terminal from the left and a potential lower than the common electrode potential is output from an even-numbered potential output terminal from the left, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal from the left and a potential higher than the common electrode potential is output from the even-numbered potential output terminal from the left;
• and
• switch means for switching between whether a potential of a pixel electrode is set using the source line on the left side of the pixel electrode and whether the potential of the pixel electrode is set using the source line on the right side of the pixel electrode, wherein if the number of pixel columns to be driven is denoted as m, the switch means has m input terminals and m+1 switch output terminals, and if a k-th input terminal from the left is denoted as Ik, k-th and k+1-th switch output terminals from the left are denoted as Ok and Ok+1, respectively, and k takes each value from 1 to m, the switch means switches, depending on whether a second control signal input to the switch means is at high level or low level, between whether the input terminal Ikis connected to the switch output terminal Ok and whether the input terminal Ik is connected to the switch output terminal Ok+1;
• the liquid crystal display device further comprising:
• first latch means having m+1 input terminals for a data reading instruction signal to give an instruction to read a pixel value, and configured such that, when the data reading instruction signal is input, the first latch means reads and holds a pixel value for one pixel corresponding to an input terminal to which the data reading instruction signal is input;
• a shift register having m signal output terminals for the data reading instruction signal and configured to output the data reading instruction signal sequentially from each signal output terminal;
• second latch means for reading pixel values of m pixels for one row collectively from the first latch means, and outputting data corresponding to each pixel value;
• level shifting means having m+1 data input terminals and m+1data output terminals and configured to shift levels of data input from the data input terminals and outputting the data from the data output terminals;
• and
• a voltage follower having m+1 potential input terminals and m+1 potential output terminals and configured to output, from the potential output terminals, potentials equal to potentials input from the potential input terminals,
• wherein the first latch means has m+1 pixel value output terminals for causing the second latch means to read pixel values,
• the second latch means has m+1 data reading terminals for reading pixel values from the first latch means and m+1 data output terminals for outputting data corresponding to pixel values of pixels for one row,
• the DA converter has m+1 data input terminals and m+1 potential output terminals,
• the signal output terminals of the shift register are connected to the input terminals of the switch means in a one-to-one relationship,
• the switch output terminals of the switch means are connected to the input terminals of the first latch means in a one-to-one relationship,
• the pixel value output terminals of the first latch means are connected to the data reading terminals of the second latch means in a one-to-one relationship,
• the data output terminals of the second latch means are connected to the data input terminals of the level shifting means in a one-to-one relationship,
• the data output terminals of the level shifting means are connected to the data input terminals of the DA converter in a one-to-one relationship,
• the potential output terminals of the DA converter are connected to the potential input terminals of the voltage follower in a one-to-one relationship,
• the potential output terminals of the voltage follower are connected to the source lines of the liquid crystal display panel,
• the level of the first control signal is switched alternately on a frame-by-frame basis,
• the level of the second control signal is switched alternately each time all rows belonging to a group are selected after the second control signal is set to high level upon starting a frame, and
• the switch means maintains a state equal to that when the second control signal is at high level until the second control signal is generated in a first frame after power-on.

A driving device for a liquid crystal display panel including a common electrode, a plurality of pixel electrodes arranged in a matrix, and source lines provided on a left side of pixel electrodes in each column of pixel electrodes and on a right side of a rightmost column of pixel electrodes, wherein when every row or every two or more consecutive rows of pixel electrodes are set as one group, a pixel electrode in each row of an odd-numbered group is connected to a source line on a predetermined side among source lines existing on both sides of the pixel electrode, and a pixel electrode in each row of an even-numbered group is connected to a source line on a side opposite to the predetermined side among the source lines existing on both sides of the pixel electrode, the driving device comprising:

• a DA converter for inputting each data corresponding to each of pixel values for one row, converting the input data to an analog voltage, and outputting a potential after subjected to conversion, wherein depending on whether a first control signal input to the DA converter is at high level or low level, the DA converter switches between whether a potential higher than a common electrode potential is output from an odd-numbered potential output terminal from the left and a potential lower than the common electrode potential is output from an even-numbered potential output terminal from the left, and whether a potential lower than the common electrode potential is output from the odd-numbered potential output terminal from the left and a potential higher than the common electrode potential is output from the even-numbered potential output terminal from the left;
• and
• switch means for switching between whether a potential of a pixel electrode is set using the source line on the left side of the pixel electrode and whether the potential of the pixel electrode is set using the source line on the right side of the pixel electrode, wherein if the number of pixel columns to be driven is denoted as m, the switch means has m input terminals and m+1 switch output terminals, and if a k-th input terminal from the left is denoted as Ik, k-th and k+1-th switch output terminals from the left are denoted as Ok and Ok+1, respectively, and k takes each value from 1 to m, the switch means switches, depending on whether a second control signal input to the switch means is at high level or low level, between whether the input terminal Ik is connected to the switch output terminal Ok and whether the input terminal Ik is connected to the switch output terminal Ok+1;
• the driving device further comprising
• a voltage follower,
• wherein depending on whether the second control signal is at high level or low level, output from a leftmost potential output terminal of the voltage follower is put into a high impedance state or output from a rightmost potential output terminal of the voltage follower is put into the high impedance state.