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US 9,176,814 B2Granted
Decoding in solid state memory devices
AssigneeInternational Business Machines Corporation
InventorsGiovanni Cherubini, Ilias Iliadis
Life of this patent
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Abstract
In a solid state memory device, codewords stored in a unit of the memory device are decoded using an error correcting iterative decoding process. An average number of iterations needed for successfully decoding codewords of the unit is determined, and the average number of iterations is monitored. The average number of iterations can be taken as a measure of wear of the subject unit.
Claims20
A method for controlling a solid state memory device, comprising:
- decoding codewords stored in a unit of the memory device using an error correcting iterative decoding process;
- determining an average number of iterations needed for successfully decoding codewords of the unit by:
- setting a plurality of counters to zero,
- introducing predetermined window of a first size,
- incrementing a first counter upon each read operation, and
- in response to the first counter matching the first size of the predetermined window, calculating the average number of iterations in the predetermined window;
- monitoring the average number of iterations, the monitoring of the average number of iterations includes comparing the average number of iterations to the threshold;
- and
- triggering at least one activity in response to the average number of iterations exceeding the threshold, the at least one activity increasing a lifetime of the solid state memory device or reducing a decoding latency of the error correcting iterative decoding process.
6 more elements
A controller for controlling a solid state memory device, comprising:
- a decoder configured to decode codewords stored in a unit of the memory device using an error correcting iterative decoding process;
- a computing unit configured to determine an average number of iterations needed for successfully decoding codewords of the unit by:
- setting a plurality of counters to zero,
- introducing predetermined window of a first size,
- incrementing a first counter upon each read operation, and
- in response to the first counter matching the first size of the predetermined window, calculating the average number of iterations in the predetermined window;
- and
- a monitoring unit configured to monitor the average number of iterations by comparing the average number of iterations to the threshold and triggering at least one activity in response to the average number of iterations exceeding the threshold,
- wherein the at least one activity increases a lifetime of the solid state memory device or reduces a decoding latency of the error correcting iterative decoding process.
6 more elements
Dependencies are inferred from the claim text.