Storage control apparatus, storage apparatus, information processing system, and storage control method

A storage control apparatus, comprising:

• one or more processors configured to:
• issue a request for a read with standard accuracy to a read address in a memory;
• perform error correction on the basis of an error correcting code and data returned by the memory in response to the read request with the standard accuracy;
• and
• issue, when an error incapable of being corrected by the error correction is caused, a request again for a read with higher accuracy than the standard accuracy to the read address,
• wherein the one or more processors are configured to perform the error correction for data having a first size on the basis of a first error correcting code and perform the error correction for data having a second size larger than the first size on the basis of a second error correcting code with a higher correction capability than the first error correcting code, and
• when the read request to the read address has a size equal to or smaller than the first size, the read request with the high accuracy is issued to the read address without issuing the read request with the standard accuracy.

A storage apparatus, comprising:

• a memory configured to deal with a read request for both of a read with standard accuracy and a read with higher accuracy than the standard accuracy;
• and
• one or more processors configured to:
• issue a request for the read with the standard accuracy to a read address in the memory;
• perform error correction on the basis of an error correcting code and data returned by the memory in response to the read request with the standard accuracy;
• issue, when an error incapable of being corrected by the error correction is caused, a request again for a read with higher accuracy than the standard accuracy to the read address;
• and
• record the read address in a case where errors are entirely corrected by the error correction and a bit count of the errors corrected satisfies a certain requirement.

An information processing system, comprising:

• a memory configured to deal with a read request for both of a read with standard accuracy and a read with higher accuracy than the standard accuracy;
• a host computer configured to issue a read access to the memory;
• and
• one or more processors configured to:
• issue a request for the read with the standard accuracy to a read address in the memory in response to the issuance of the read access;
• perform error correction on the basis of an error correcting code and data returned by the memory in response to the read request with the standard accuracy;
• issue, when an error incapable of being corrected by the error correction is caused, a request again for a read with higher accuracy than the standard accuracy to the read address;
• and
• record the read address in a case where errors are entirely corrected by the error correction and a bit count of the errors corrected satisfies a certain requirement.

A storage control method, comprising:

• issuing a request for a read with standard accuracy to a read address in a memory;
• performing error correction on the basis of an error correcting code and data returned by the memory in response to the read request with the standard accuracy;
• and
• issuing, when an error incapable of being corrected by the error correction is caused, a request again for a read with higher accuracy than the standard accuracy to the read address,
• wherein the error correction for data having a first size is performed on the basis of a first error correcting code and the error correction for data having a second size larger than the first size is performed on the basis of a second error correcting code with a higher correction capability than the first error correcting code, and
• when the read request to the read address has a size equal to or smaller than the first size, the read request with the high accuracy is issued to the read address without issuing the read request with the standard accuracy.

A storage control method, comprising:

• issuing a request for a read with standard accuracy to a read address in a memory;
• performing error correction on the basis of an error correcting code and data returned by the memory in response to the read request with the standard accuracy;
• issuing, when an error incapable of being corrected by the error correction is caused, a request again for a read with higher accuracy than the standard accuracy to the read address;
• and
• recording the read address in a case where errors are entirely corrected by the error correction and a bit count of the errors corrected satisfies a certain requirement.