Computer and memory inspection method
AssigneeHitachi, Ltd.
InventorsNaoya Hattori, Toshiomi Moriki
Life of this patent
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AssigneeHitachi, Ltd.
InventorsNaoya Hattori, Toshiomi Moriki
Estimating the term…
In a memory inspection in a computer installing a x86 CPU, system software related to low-frequent processing is prevented from going down, and the suppression of performance degradation and the avoidance of a reduction in memory capacity by the memory inspection is realized. The computer having a processor, a memory, and an I/O device. The memory stores a system software realizing a system control unit, and an inspection program realizing an inspection unit. The processor has a memory fault notifying unit notifying the system control unit of a fault address. The system control unit includes an adjustment unit that determines whether the inspection program needs to be executed, or not, based on the type of event occurring, plural event processing units processing the event by using different storage areas of the memory, a fault recording unit recording the memory fault, and an event processing unit selector.
A computer, comprising:
A memory inspection method in a computer having a processor, a memory connected to the processor, and an I/O device connected to the processor,
Dependencies are inferred from the claim text.