Controlling the execution of adjacent instructions that are dependent upon a same data condition

A data processing apparatus comprising:

• an instruction decoder configured to decode a stream of instructions;
• a data processor configured to process said decoded stream of instructions;
• wherein
• said data processor is configured to analyse said stream of instructions and to identify within said stream of instructions a plurality of vector instructions for processing vector data elements, each vector instruction comprising a mask controlling which elements in said vector data elements are processed, and in response to identifying said plurality of vector instructions said data processor is configured to:
• commence determining whether said mask comprises zeros indicating no data elements are to be processed;
• and
• commence processing said plurality of vector instructions without waiting for a determination of whether said mask comprises said zeros;
• and
• in response to determining that said mask comprises said zeros, skip to a next instruction to be executed after said plurality of vector instructions without executing any intermediate ones of said plurality of vector instructions not yet executed and without restoring state to data registers, and continue execution at said next instruction.

A method of compiling an application for execution by a data processor comprising the steps of:

• analysing a plurality of instructions within said application;
• detecting whether said plurality of instructions include a plurality of adjacent instructions execution of which is dependent upon a same data condition and whose execution when said data condition is not met does not change a value stored in any data register;
• if said plurality of instructions include said plurality of adjacent instructions, then generating a stream of instructions including a skip instruction followed by said plurality of adjacent instructions;
• said skip instruction specifying a target address and said data condition, said target address being an address of a next instruction subsequent to said adjacent instructions, said skip instruction, when executed by said data processor, controlling said data processor to:
• commence determination of whether said data condition is met or not;
• and
• commence processing of said plurality of adjacent instructions without waiting for the determination of whether said data condition is met or not;
• and
• in response to determining that said data condition is not met, skipping to a next instruction subsequent to said plurality of adjacent instructions without executing any intermediate ones of said plurality of adjacent instructions not yet executed and without restoring state to data registers, and to continue execution at said next instruction;
• and
• in response to determining that said data condition is met, continuing to execute said plurality of adjacent instructions.

A method of processing data comprising the following steps:

• decoding a stream of instructions;
• processing said decoded stream of instructions;
• in response to a plurality of adjacent instructions within said stream of instructions execution of which is dependent upon a data condition being met and whose execution when said data condition is not met does not change a value stored in any data register:
• commence determining whether said data condition is met or not;
• and
• commence processing said plurality of adjacent instructions without waiting for a determination of whether said data condition is met or not;
• and
• in response to determining that said data condition is not met, skip to a next instruction to be executed after said plurality of adjacent instructions without executing any intermediate ones of said plurality of adjacent instructions not yet executed and without restoring state to data registers, and continue execution at said next instruction.

A method of processing data comprising the following steps:

• decoding a stream of instructions;
• processing said decoded stream of instructions;
• and
• in response to identifying within said stream of instructions a plurality of vector instructions for processing vector data elements, each vector instruction comprising a mask controlling which elements in said vector data elements are processed:
• commencing determining whether said mask comprises zeros indicating no data elements are to be processed;
• and
• commencing processing said plurality of vector instructions without waiting for a determination of whether said mask comprises said zeros;
• and
• in response to determining that said mask comprises said zeros, skipping to a next instruction to be executed after said plurality of vector instructions without executing any intermediate ones of said plurality of vector instructions not yet executed and without restoring state to data registers, and continuing execution at said next instruction.