System and method for performing predicated selection of an output register

A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform steps comprising:

• receiving an instruction associated with a first predicate condition and a second predicate condition;
• executing the instruction to generate a result;
• determining whether the first predicate condition is true;
• if the first predicate condition is true, then storing the result of the instruction in a first output register, or
• if the first predicate condition is false, then storing the result of the instruction in a second output register;
• and
• determining whether the second predicate condition is true;
• and
• if the second predicate condition is true, then applying a first input argument to the opcode, or
• if the second predicate condition is false, then applying a second input argument to the opcode.

A processor comprising:

• an instruction register for storing an instruction having an opcode associated with a first predicate condition and a second predicate condition;
• a first predicate register for storing the first predicate condition;
• a second predicate register for storing the second predicate condition;
• a first output register;
• and
• a second output register,
• wherein the processor is configured to:
• execute the instruction to generate a result,
• determine whether the first predicate condition is true,
• if the first predicate condition is true, then storing the result of the instruction in the first output register, or
• if the first predicate condition is false, then storing the result of the instruction in the second output register, and
• determine whether the second predicate condition is true, and
• if the second predicate condition is true, then apply a first input argument to the opcode, or
• if the second predicate condition is false, then apply a second input argument to the opcode.