Memory device
AssigneeKabushiki Kaisha Toshiba
InventorKonosuke Watanabe
Life of this patent
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Abstract
According to an embodiment of the invention, a memory device includes an interface unit, a determining unit, a second command generating unit, and a processor. The interface unit receives a first command from the outside of the memory device. The determining unit determines whether the first command received by the interface unit is an access command that is a write command or a read command. When the determining unit determines that the first command is the access command, the second command generating unit extracts access destination information, which is address information or size information of an access destination, from the first command and generates a second command which includes the extracted access destination information and has a size less than that of the first command. The processor executes the second command.
Claims24
A memory device that is connected to a host device, receives a command from the host device, and performs a process based on the command, the memory device comprising:
- an interface unit that receives a first command from the outside of the memory device;
- a determining unit that determines whether the first command received by the interface unit is an access command that is a write command or a read command;
- a second command generating unit that, when the determining unit determines that the first command is the access command, extracts access destination information, which is address information or size information of an access destination, from the first command and generates a second command which includes the extracted access destination information and has a size less than that of the first command;
- and
- a processor that executes the second command.
A memory device that is connected to a host device, receives a command output from the host device, and executes the command, the memory device comprising:
- an interface unit that receives, from the outside of the memory device, a command including command type information stored in a fixed field and command execution content information stored in a field which is defined for each command type information item;
- a reception queue that stores the command received by the interface unit;
- an extraction unit that extracts the command type information included in the command;
- and
- a processor that acquires the command execution content information from the field corresponding to the extracted command type information in the command which is stored in the reception queue and performs a process corresponding to the command based on the acquired command execution content information.
A memory device that is connected to a host device including a memory in which a device use area is ensured, receives a command from the host device, and performs a process based on the command, the memory device comprising:
- a processor that generates access destination information indicating a read destination in the device use area;
- a packet construction unit that generates a read command with a size more than that of the access destination information, based on the access destination information;
- and
- an interface unit that outputs the read command generated by the packet construction unit to the outside of the memory device.
A memory device that is connected to a host device including a memory in which a device use area is ensured, receives a command from the host device, and performs a process based on the command, the memory device comprising:
- an access command generating unit that generates an access command which is for access to the device use area;
- an interface unit that outputs the access command generated by the access command generating unit to the outside of the memory device and receives a packet including acknowledgement corresponding to the access command from the outside of the memory device;
- a determining unit that determines the packet received by the interface unit is normal acknowledgement indicating normal ending or abnormal acknowledgement indicating abnormal ending, stores the abnormal acknowledgement in a reception queue when the packet is the abnormal acknowledgement, and does not store the normal acknowledgement in the reception queue when the packet is the normal acknowledgement;
- and
- a processor that acquires the abnormal acknowledgement from the reception queue.
Dependencies are inferred from the claim text.