Microprocessor and method for driving microprocessor
AssigneeSemiconductor Energy Laboratories Co., Ltd.
InventorTatsuji Nishijima
Life of this patent
Estimating the term…
Abstract
A microprocessor with low power consumption and a method for driving the microprocessor are provided. The microprocessor includes a processor core, a cache memory, an interrupt controller, and a power supply controller. As at least one of a plurality of memory cell arrays included in the cache memory, a memory cell array composed of a plurality of memory cells is used. At the time of switching to a low power consumption mode, data used by the processor core after supply of power is resumed is prefetched to the memory cell array; then supply of power to the cache memory is stopped. Then, the processor core fetches needed data from the memory cell array after supply of power to the cache memory is resumed.
Claims9
A microprocessor comprising:
- a processor core configured to perform arithmetic processing;
- a cache memory comprising a memory cell array including a plurality of memory cells;
- an interrupt controller configured to store an interrupt vector;
- and
- a power supply controller configured to control a state of supplying power to the memory cell array including the plurality of memory cells of the cache memory,
- wherein the microprocessor have a first operation mode and a second operation mode,
- wherein in the first operation mode,
- the processor core loads the interrupt vector stored in the interrupt controller, and performs a prefetch of data to the memory cell array included in the cache memory according to the interrupt vector;
- and
- the power supply controller performs a power supply stopping process on the cache memory after the prefetch is completed, and
- wherein in the second operation mode,
- the power supply controller detects an interrupt event to perform a power supply resuming process on the cache memory;
- and
- the processor core fetches the data in the memory cell array included in the cache memory after supply of power to the cache memory is resumed.
A method for driving a microprocessor,
- wherein the microprocessor comprises:
- a processor core performing arithmetic processing;
- a cache memory comprising a memory cell array including a plurality of memory cells;
- an interrupt controller configured to store an interrupt vector;
- and
- a power supply controller configured to control a state of supplying power to the memory cell array including the plurality of memory cells of the cache memory,
- wherein the microprocessor is switched to a low power consumption mode by:
- loading the interrupt vector stored in the interrupt controller and issuing a prefetch instruction according to the interrupt vector to the cache memory by the processor core;
- outputting a first signal for an instruction to stop supplying power to the cache memory to the power supply controller by the processor core after or during prefetch;
- and
- receiving the first signal and performing a power supply stopping process on the cache memory by the power supply controller, and
- wherein the microprocessor is switched to a normal operation mode by:
- outputting a second signal for an instruction to resume supplying power to the cache memory to the power supply controller by the interrupt controller;
- receiving the second signal and resuming supply of power to the cache memory by the power supply controller;
- and
- loading the interrupt vector stored in the interrupt controller and fetching data from the memory cell array included in the cache memory according to the interrupt vector by the processor core.
Dependencies are inferred from the claim text.