US 9,176,353 B2Granted

Liquid crystal display device

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorsShunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara, Hajime Kimura, Hidekazu Miyairi, Yoshiyuki Kurokawa, Satoshi Kobayashi

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Abstract

An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

Claims18

Dependent claims

A liquid crystal display device including a transistor comprising:

a gate electrode;
a gate insulating film over the gate electrode;
a microcrystalline semiconductor film over the gate insulating film, the microcrystalline semiconductor film comprising a channel formation region;
a buffer layer over the microcrystalline semiconductor film;
source and drain regions over and in direct contact with the buffer layer;
and
source and drain electrodes over the source and drain regions,
wherein entirety of one of the source and drain electrodes is provided on one of the source and drain regions,
wherein a part of an upper surface of the source region is in direct contact with the source electrode,
wherein a part of an upper surface of the drain region is in direct contact with the drain electrode,
wherein the buffer layer comprises an amorphous semiconductor film containing nitrogen,
wherein the buffer layer comprises:
a concave portion overlapping the channel formation region;
and
an end portion,
wherein at least one of the source and drain electrodes does not overlap with a horizontal upper surface of the end portion of the buffer layer, and
wherein a side of the concave portion is aligned with edges of the source and drain regions.

14 more elements

A liquid crystal display device including a transistor comprising:

a gate electrode;
a gate insulating film over the gate electrode;
a microcrystalline semiconductor film over the gate insulating film, the microcrystalline semiconductor film comprising a channel formation region;
a buffer layer over the microcrystalline semiconductor film;
source and drain regions over and in direct contact with the buffer layer;
source and drain electrodes over the source and drain regions;
and
an insulating film over the source and drain electrodes, and the source and drain regions,
wherein entirety of one of the source and drain electrodes is provided on one of the source and drain regions,
wherein a part of an upper surface of the source region, a part of an upper surface of the drain region, and a part of the buffer layer are in direct contact with the insulating film,
wherein the buffer layer comprises an amorphous semiconductor film containing nitrogen,
wherein the buffer layer comprises:
a concave portion overlapping the channel formation region;
and
an end portion,
wherein at least one of the source and drain electrodes does not overlap with a horizontal upper surface of the end portion of the buffer layer, and
wherein a side of the concave portion is aligned with edges of the source and drain regions.

14 more elements

A liquid crystal display device including a transistor comprising:

a gate electrode;
a gate insulating film over the gate electrode;
a microcrystalline semiconductor film over the gate insulating film, the microcrystalline semiconductor film comprising a channel formation region;
a buffer layer over the microcrystalline semiconductor film;
source and drain regions over and in direct contact with the buffer layer;
and
source and drain electrodes over the source and drain regions,
wherein entirety of one of the source and drain electrodes is provided on one of the source and drain regions,
wherein the source and drain regions extend beyond edges of the source and drain electrodes,
wherein a distance between edges of the source and drain regions facing each other is shorter than a distance between the edges of the source and drain electrodes facing each other,
wherein the buffer layer comprises an amorphous semiconductor film containing nitrogen, and
wherein the buffer layer comprises:
a concave portion overlapping the channel formation region;
and
an end portion,
wherein at least one of the source and drain electrodes does not overlap with a horizontal upper surface of the end portion of the buffer layer, and
wherein a side of the concave portion is aligned with the edges of the source and drain regions.

14 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/213,728Filed 24 Jun 2008
Priority: JP 2007-17354029 Jun 2007
Published: US 2009/0002591 A11 Jan 2009
Granted: 3 Nov 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

G02F 1/1368
Active matrix addressed cells: in which the switching element is a three-electrode device
G02F 1/133345
Constructional arrangements; Manufacturing methods: insulating layers
H10D 30/0316
Characterised by the gate electrodes: of lateral bottom-gate TFTs comprising only a single gate
H10D 30/0321
Of thin-film transistors [TFT]: comprising silicon, e.g. amorphous silicon or polysilicon