Position-sensitive readout modes for digital silicon photomultiplier arrays

An apparatus comprising:

• a photon detector including:
• a detector array comprising single photon avalanche diode (SPAD) detectors configured to break down responsive to impingement of a photon;
• trigger circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the detector array;
• latches configured to store position coordinates of SPAD detectors of the detector array that are in break down, the latches being configured to latch responsive to a trigger signal generated by the trigger circuitry;
• and
• at least one delay element that delays propagation of the trigger signal to the latches by an integration time interval such that the latches after latching provide a position coordinates for the SPAD detectors that break down over the integration time interval.

A method comprising:

• providing a detector array comprising single photon avalanche diode (SPAD) detectors configured to break down responsive to impingement of a photon in a position;
• providing latches configured to store position coordinates of a SPAD detector of the detector array that is in break down;
• generating a trigger signal responsive to break down of a SPAD detector of the detector array;
• latching the latches responsive to the trigger signal;
• and
• performing time to digital conversion triggered by the trigger signal to generate a time stamp for the breakdown of the SPAD detector whose break down caused the generating of the trigger signal.

An apparatus comprising:

• a photon detector including:
• an array of single photon avalanche diode (SPAD) detectors,
• latches configured to store position coordinates of a SPAD detector of the array that is in breakdown,
• triggering circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the array wherein the trigger signal causes latching of the latches,
• processing circuitry configured to output a photon detection position based on position coordinates stored in the latched latches;
• and
• time to digital converter (TDC) circuitry configured to generate a digital time stamp for a trigger signal generated by the trigger circuitry.

An apparatus comprising:

• a photon detector including:
• an array of single photon avalanche diode (SPAD) detectors,
• latches configured to store position coordinates of SPAD detectors of the array that are in breakdown,
• triggering circuitry configured to generate a trigger signal responsive to break down of a SPAD detector of the array wherein the trigger signal causes latching of the latches,
• at least one delay element that delays the latching by an integration time, and
• processing circuitry configured to output detection positions of photons detected over the integration time based on position coordinates stored in the latched latches.