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US 9,176,190 B2Granted
Test circuit and semiconductor apparatus including the same
AssigneeSK hynix Inc.
InventorsDong Uk Lee, Young Ju Kim
Life of this patent
Estimating the term…
Abstract
A test circuit includes a through via test unit configured to be set to a first resistance value in response to a first test control signal and to a second resistance value in response to the first test control signal and a second test control signal, and form a current path including a through via that electrically connects a first chip and a second chip; and a test measurement unit configured to supply a test voltage to the through via and measure a current flowing through the through via.
Claims9
A test circuit comprising:
- a through via test unit configured to be set to a first resistance value in response to a first test control signal and to a second resistance value in response to the first test control signal and a second test control signal, and form a current path that includes a through via that electrically connects a first chip and a second chip;
- a test measurement unit configured to supply a test voltage to the through via and to measure an amount of current flowing through the through via;
- and
- a test control unit configured to enable the first test control signal when a double test signal is disabled and a test enable signal is enabled, and enables the first and second test control signals when both the test enable signal and the double test signal are enabled.
1 more element
A test circuit comprising:
- a first selection part configured to apply a test voltage to a through via, that electrically connects first and second chips, in response to a first test control signal;
- a second selection part configured to apply the test voltage to the through via in response to a second test control signal;
- a first driver part configured to drive the through via to a ground potential in response to the first test control signal;
- and
- a second driver part configured to drive the through via to the ground potential in response to the second test control signal,
- a test control unit configured to generate the first and second control signals in response to a test enable signal and a double test signal.
3 more elements
Dependencies are inferred from the claim text.