Integrated bondline spacers for wafer level packaged circuit devices

A wafer level packaged circuit device, comprising:

• a device wafer bonded to a cap wafer;
• and
• an integrated bond gap control structure (BGCS) disposed between the device wafer and the cap wafer, the integrated BGCS comprising one or more material layers used in the formation of at least one of the cap wafer and the device wafer, and left remaining in a region of a substrate of at least one of the cap wafer and the device wafer;
• wherein at least a portion of the integrated BGCS is formed on the device wafer, and further comprises one or more of:
• a solder metal stack layer, and a polyimide layer.

A wafer level packaged circuit device, comprising:

• a device wafer bonded to a cap wafer;
• an integrated bond gap control structure (BGCS) disposed between the device wafer and the cap wafer, the integrated BGCS comprising one or more material layers used in the formation of the device wafer, and left remaining in a region of a substrate of the device wafer;
• and
• a polyimide layer formed in the region of the substrate of the device wafer, wherein the polyimide layer is a same polyimide layer that is also used in the formation of an integrated circuit on the device wafer, and wherein the integrated BGCS comprises the polyimide layer.

A wafer level packaged circuit device, comprising:

• a device wafer bonded to a cap wafer;
• an integrated bond gap control structure (BGCS) disposed between the device wafer and the cap wafer, the integrated BGCS comprising one or more material layers used in the formation of the cap wafer, and left remaining in a region of a substrate of the cap wafer;
• and
• an antireflective coating layer formed in the region of the substrate of the cap wafer, wherein the antireflective coating layer is a same antireflective coating layer that is also formed on a cavity portion of the cap wafer, and wherein the integrated BGCS comprises the antireflective coating layer.