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US 9,172,354 B2Granted
Analog active low-pass filters
AssigneeAnalog Devices, Inc.
InventorAlexandru Ciubotaru
Life of this patent
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Abstract
Apparatus and methods for high-frequency low-pass filtering are disclosed. A first resistor is operatively coupled between a first node and a second node. A second resistor is operatively coupled between the second node and a third node. An amplifier circuit has a first input operatively coupled to the third node and a first output operatively coupled to a fourth node. The first output is configured to provide a first output signal. A first complex impedance network is operatively coupled between the fourth node and the third node. A first feedback path is operatively coupled between the fourth node and the second node. The first feedback path is configured to invert at least a portion of the first output signal. The first feedback path is further configured to provide a first feedback capacitance at the second node.
Claims10
An apparatus comprising:
- a first amplification stage, the first amplification stage comprising:
- first, second, third, fourth, fifth, sixth, seventh, and eighth nodes;
- a first resistor operatively coupled between the first node and the second node;
- a second resistor operatively coupled between the second node and the third node;
- a third resistor operatively coupled between the fifth node and the sixth node;
- a fourth resistor operatively coupled between the sixth node and the seventh node;
- an amplifier circuit having a first input operatively coupled to the third node, a second input operatively coupled to the seventh node, a first output operatively coupled to the fourth node, wherein the first output is configured to provide a first output signal, and a second output operatively coupled to the eighth node, wherein the second output of the amplifier circuit is configured to provide a second output signal;
- a first complex impedance network operatively coupled between the fourth node and the third node;
- a second complex impedance network operatively coupled between the eighth node and the seventh node;
- a first capacitor having a first end and a second end, wherein a first end of the first capacitor is operatively coupled to the eighth node, and wherein the second end of the first capacitor is operatively coupled to the second node;
- and
- a second capacitor having a first end and a second end, wherein a first end of the second capacitor is operatively coupled to the fourth node, and wherein the second end of the second capacitor is operatively coupled to the sixth node,
- a fifth resistor having a first end and a second end, wherein the first end is coupled to the third node and the second end is coupled to the first input of the amplifier circuit to operatively couple the third node to the first input;
- and
- a sixth resistor having a first end and a second end, wherein the first end is coupled to the seventh node and the second end is coupled to the second input of the amplifier circuit to operatively couple the seventh node to the second input.
12 more elements
An apparatus comprising:
- a first amplification stage, the first amplification stage comprising:
- first, second, third, fourth, fifth, sixth, seventh, and eighth nodes;
- a first resistor operatively coupled between the first node and the second node;
- a second resistor operatively coupled between the second node and the third node;
- a third resistor operatively coupled between the fifth node and the sixth node;
- a fourth resistor operatively coupled between the sixth node and the seventh node;
- an amplifier circuit having a first input operatively coupled to the third node, a second input operatively coupled to the seventh node, a first output operatively coupled to the fourth node, wherein the first output is configured to provide a first output signal, and a second output operatively coupled to the eighth node, wherein the second output of the amplifier circuit is configured to provide a second output signal;
- a first complex impedance network operatively coupled between the fourth node and the third node;
- a second complex impedance network operatively coupled between the eighth node and the seventh node;
- a first capacitor having a first end and a second end, wherein a first end of the first capacitor is operatively coupled to the eighth node, and wherein the second end of the first capacitor is operatively coupled to the second node;
- a second capacitor having a first end and a second end, wherein a first end of the second capacitor is operatively coupled to the fourth node, and wherein the second end of the second capacitor is operatively coupled to the sixth node;
- a fifth resistor having a first end and a second end, wherein the first end is coupled to the third node and the second end is coupled to the first input of the amplifier circuit to operatively couple the third node to the first input;
- and
- a sixth resistor having a first end and a second end, wherein the first end is coupled to the seventh node and the second end is coupled to the second input of the amplifier circuit to operatively couple the seventh node to the second input;
- and
- an input stage circuit operatively coupled to the first node, the input stage circuit comprising:
- ninth and tenth nodes;
- a seventh resistor having a first end configured to receive a first input signal and a second end operatively coupled to the ninth node;
- an eighth resistor having a first end configured to receive a second input signal and a second end operatively coupled to the tenth node;
- a third capacitor having a first end operatively coupled to the ninth node and a second end operatively coupled to the tenth node
- a first buffer having an input operatively coupled to the ninth node and an output operatively coupled to the first node;
- and
- a second buffer having an input operatively coupled to the tenth node and an output operatively coupled to the fifth node.
20 more elements
Dependencies are inferred from the claim text.