High-yield fabrication of large-format substrates with distributed, independent control elements
AssigneeSemprius, Inc.
InventorsChristopher Bower, Etienne Menard, John Hamer, Ronald S. Cok
Life of this patent
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Abstract
A large-format substrate with distributed control elements is formed by providing a substrate and a wafer, the wafer having a plurality of separate, independent chiplets formed thereon; imaging the wafer and analyzing the wafer image to determine which of the chiplets are defective; removing the defective chiplet(s) from the wafer leaving remaining chiplets in place on the wafer; printing the remaining chiplet(s) onto the substrate forming empty chiplet location(s); and printing additional chiplet(s) from the same or a different wafer into the empty chiplet location(s).
Claims24
A method of assembling integrated circuit elements on a receiving substrate, the method comprising:
- providing a wafer having a plurality of chiplets thereon;
- determining that at least one of the chiplets on the wafer is defective;
- selectively removing the at least one of the chiplets that is defective from the wafer to define at least one empty chiplet location on the wafer between ones of the chiplets on the wafer prior to transferring the ones of the chiplets onto the receiving substrate;
- printing the ones of the chiplets from the wafer onto the receiving substrate in parallel, using a stamp that separates the ones of the chiplets from the wafer and adheres the ones of the chiplets thereto, to define the at least one empty chiplet location therebetween on the receiving substrate;
- and
- printing at least one additional chiplet onto to the at least one empty chiplet location on the receiving substrate.
A method of making a large-format substrate with distributed control elements, the method comprising:
- providing a display substrate and a source wafer, the source wafer having a plurality of separate, independent chiplets formed thereon;
- then
- imaging the source wafer and analyzing the wafer image, or electrically testing the chiplets, to determine which of the chiplets are defective;
- then
- removing the defective chiplet(s) from the source wafer leaving chiplet(s) in place on the wafer and defining empty chiplet location(s) therebetween on the source wafer;
- then
- simultaneously printing the chiplet(s) onto the display substrate forming the empty chiplet location(s) on the display substrate, wherein the chiplet(s) comprise a portion of the chiplets formed on the source wafer;
- then
- printing additional chiplet(s) from the source wafer or a different wafer in to the empty chiplet location(s) on the display substrate;
- then
- forming electrical connections to the chiplet(s) and the additional chiplet(s) that have been printed on the display substrate by depositing and patterning conductive layers and insulator layers on the display substrate to define a plurality of interconnected chiplets thereon;
- and then
- forming electro-luminescent structures on the display substrate to define pixels thereon, wherein the electro-luminescent structures are operable responsive to signals provided by the interconnected chiplets, and wherein the interconnected chiplets that have been printed on the display substrate are disposed in spaces between rows or columns of the pixels in plan view.
Dependencies are inferred from the claim text.