CubeSat system, method and apparatus
AssigneeCal Poly Corporation
InventorsJordi Puig-Suari, Austin Williams
Life of this patent
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Abstract
A satellite system includes a chassis, an avionics package included within an upper portion of the chassis. The avionics package includes a main system board, a payload interface board, at least one daughter board and a battery board. The main system board, the payload interface board, the at least one daughter board, and the battery board reside in substantially parallel planes. The payload interface board, the at least one daughter board, and the battery board are coupled to the main system board through one or more stackable connectors. A method of operating a satellite is also described.
Claims19
A satellite system comprising:
- a chassis;
- an avionics package included within an upper portion of the chassis, the avionics package including:
- a main system board, the main system board includes a long duration timer having a selectable time interval of between about one day and about 12 months and wherein the long duration timer is configured to interrupt power to at least a portion of the satellite when the long duration timer counts down to zero, wherein the at least a portion of the satellite includes a processor on the main system board and wherein the long duration timer is configured to interrupt power is not capable of being disabled and the interruption of power to the processor initiates a reset that will reset the avionics package to a known base operation configuration independent of a checksum or other error detection systems and wherein at least a portion of the avionics package is constructed on non-radiation hardened components;
- a payload interface board;
- at least one daughter board;
- and
- a battery board, the main system board, the payload interface board, the at least one daughter board, and the battery board residing in substantially parallel planes and wherein the payload interface board, the at least one daughter board, and the battery board are coupled to the main system board through one or more of a plurality of stackable connectors.
A method of rebooting a satellite comprising:
- retrieving an operating system image stored in a non-volatile phase change memory system;
- storing the retrieved operating system image in the volatile memory system;
- calculating a checksum value of the operating system image stored in the volatile memory system;
- comparing the calculated the checksum value with a known value;
- initiating a hard reboot if the calculated the checksum value is not equal to the known value;
- booting the operating system from the volatile memory system if the calculated the checksum value is equal to the known value;
- and
- interrupting power to at least the portion of the satellite when a long duration timer counts down to zero to initiate a system reboot independent of the value of the calculated checksum, wherein the at least a portion of the satellite includes a processor on the main system board and wherein the long duration timer is configured to interrupt power to the processor is not capable of being disabled and the interruption of power to the processor initiates a reset that will reset the avionics package to a known base operation configuration and wherein at least a portion of the avionics package is constructed on non-radiation hardened components.
A method of rebooting at least a portion of a satellite comprising:
- initiating a hard reboot if an operating system is corrupted including:
- calculating a checksum value of the operating system image stored in a volatile memory system included in the satellite;
- comparing the calculated the checksum value with a known value;
- initiating the hard reboot if the calculated the checksum value is not equal to the known value;
- and
- initiating the hard reboot of at least a portion of the satellite when a long duration timer counts down to zero independent of the value of the calculated checksum, wherein the long duration timer is included in the satellite, wherein the at least a portion of the satellite includes a processor and wherein the long duration timer is configured to interrupt power to the processor is not capable of being disabled and the interruption of power to the processor initiates a reset that will reset an avionics package included in the satellite system to a known base operation configuration and wherein at least a portion of the avionics package is constructed on non-radiation hardened components.
Dependencies are inferred from the claim text.