Flash gate air gap

A flash memory cell comprising:

• an active area of silicon on the substrate;
• a polysilicon floating gate over the active area of silicon, wherein the polysilicon floating gate is vertically separated from the active area of silicon by a void in which there is no condensed matter but only vacuum or material in a gas phase;
• and
• conformal silicon oxide which contacts sidewalls of both the polysilicon and the active area silicon, wherein the conformal silicon oxide also borders the void.

A method of forming a flash memory cell on a substrate, the method comprising:

• forming dummy silicon oxide over active area silicon on the substrate;
• forming polysilicon over the dummy silicon oxide;
• patterning the polysilicon and the dummy silicon oxide into a stack having vertical walls;
• forming conformal silicon oxide on the vertical walls of the stack, wherein the conformal silicon oxide borders a vertical wall of the polysilicon, a vertical wall of the dummy silicon oxide and a vertical wall of the active area silicon;
• transferring the patterned substrate into a substrate processing region of a substrate processing chamber;
• flowing a fluorine-containing precursor into a remote plasma region fluidly coupled to the substrate processing region while forming a plasma in the remote plasma region to produce plasma effluents;
• flowing the plasma effluents into the substrate processing region housing the substrate, wherein the plasma effluents flow into the substrate processing region through perforations in an ion suppression element disposed between the remote plasma region and the substrate processing region;
• selectively removing the dummy silicon oxide with the plasma effluents to leave behind a void, wherein the conformal silicon oxide, the polysilicon and the active area silicon all remain in place following the selective removal of the dummy silicon oxide;
• and
• depositing non-conformal silicon oxide to trap the void in the flash memory cell.