Closed-loop high-speed channel equalizer adaptation
AssigneeTexas Instruments Incorporated
InventorsRoland Sperlich, Huanzhang Huang, Charles M. Branch
Life of this patent
Estimating the term…
Abstract
A serial communication circuit (FIG. 3) is disclosed. The circuit includes an equalizer circuit (306) arranged to receive a data signal (CH 1) and produce an equalized data signal. A log detector circuit (300) receives the data signal and produces a power signal indicating a power level of the data signal. A decision circuit (332) receives the power signal and produces a select signal. A first selection circuit (336) receives a plurality of first correction signals and applies one of the first correction signals to the equalizer circuit in response to the select signal.
Claims2
A method of equalizing a data signal, comprising:
- receiving a plurality of data signals;
- producing a plurality of power signals indicating a power level of each respective data signal;
- producing a select signal in response to the plurality of power signals;
- selecting a first correction signal from a first plurality of correction signals in response to the select signal;
- selecting a second correction signal from a second plurality of correction signals in response to the select signal;
- equalizing the plurality of data signals in response to the first and second correction signals to produce a respective plurality of equalized data signals;
- amplifying the plurality of equalized data signals to produce a respective plurality of amplified and equalized data signals;
- and
- producing the second plurality of correction signals from a respective second plurality of filter circuits in response to the amplified and equalized data signals.
Dependencies are inferred from the claim text.