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US 9,113,547 B2Granted
Same layer microelectronic circuit patterning using hybrid laser projection patterning (LPP) and semi-additive patterning(SAP)
AssigneeIntel Corporation
InventorsJohn Guzek, Yonggang Li
Life of this patent
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Abstract
In some embodiments, same layer microelectronic circuit patterning using hybrid laser projection patterning (LPP) and semi-additive patterning (SAP) is presented. In this regard, a method is introduced including patterning a first density region of a laminated substrate surface using LPP, patterning a second density region of the laminated substrate surface using SAP, and plating the first and second density regions of the laminated substrate surface, wherein features spanning the first and second density regions are directly coupled. Other embodiments are also disclosed and claimed.
Claims7
A method comprising:
- forming a dielectric protrusion on a laminated substrate surface, the dielectric including a necking region and a main routing region, the necking region including an area within a footprint of a die to be situated on the dielectric, and the main routing region contiguous with the necking region and extending outwardly therefrom;
- ablating only the dielectric in the necking region with laser projection patterning (LPP);
- plating the main routing region and the necking region with copper;
- removing over-plated copper from the main routing region and the necking region;
- electroless copper plating over the main routing region and the necking region;
- patterning the main routing region and the necking region on the dielectric with dry film resist (DFR);
- plating the main routing region such that a routing density in the necking region is greater than a routing density in the main region;
- and
- removing the DFR.
6 more elements
Dependencies are inferred from the claim text.