Microelectronic packages containing stacked microelectronic devices and methods for the fabrication thereof

A method for fabricating a microelectronic package, comprising:

• bonding an upper package layer to a lower microelectronic device to produce a device stack, the upper package layer comprising:
• an inner molded body;
• at least one upper microelectronic device surrounded by the inner molded body;
• and
• an interconnect buffer layer formed over the inner molded body and over the at least one upper microelectronic device;
• encapsulating the device stack within a molded panel having a frontside and a backside through which the lower microelectronic device is exposed;
• planarizing the frontside of the molded panel to reveal the interconnect buffer layer therethrough;
• producing one or more frontside redistribution layers over the frontside of the molded panel and electrically coupled to the at least one upper microelectronic device through the interconnect buffer layer;
• and
• singulating the molded panel to yield a microelectronic package including an outer molded package body containing the device stack and formed around the inner molded body and the interconnect buffer layer.

A microelectronic package, comprising:

• a device stack, comprising:
• a lower microelectronic device;
• a first upper microelectronic device positioned over the lower microelectronic device;
• an inner molded body surrounding the first upper microelectronic device;
• an interconnect buffer layer disposed over the first upper microelectronic device and the inner molded body;
• an outer molded body in which the device stack is embedded, the outer molded body formed around the inner molded body and the interconnect buffer layer;
• one or more frontside redistribution layers disposed over a frontside of the outer molded body and electrically coupled to the first upper microelectronic device through the interconnect buffer layer;
• one or more backside redistribution layers disposed over a backside of the outer molded body and electrically coupled to the lower microelectronic device;
• and
• at least one contact array electrically coupled to the lower microelectronic device through the backside redistribution layers and to the upper microelectronic device through the frontside redistribution layers and the interconnect buffer layer.