Graphics accelerator

A graphics accelerator comprising:

• an integrated circuit comprising:
• a local memory operable to store graphics data, the graphics data comprising a plurality of pixels;
• a processor operable to perform at least one operation, in parallel, on a plurality of components of at least a portion of the pixels, the plurality of components of a single pixel contained within a vector and the at least one operation comprising at least one vector operation, the processor operable to perform the at least one vector operation on the vector to process the plurality of components of the single pixel in parallel;
• one or more processing pipelines operable to process the graphics data;
• and
• a direct memory access (DMA) engine operable to transfer the graphics data between the local memory and an external memory that is external to the graphics accelerator,
• wherein the graphics accelerator is operable to, at least:
• operate on graphics data corresponding to a present set of pixels while the DMA engine transfers graphics data corresponding to a future set of pixels;
• and
• transfer data between the external memory and the one or more processing pipelines by directing data between the external memory and the one or more pipelines.

A graphics accelerator comprising:

• an integrated circuit comprising:
• a local memory operable to store graphics data, the graphics data representing a plurality of pixels;
• a direct memory access (DMA) engine operable to transfer the graphics data between the local memory and an external memory that is external to the graphics accelerator;
• a processor operable to perform at least one operation, in parallel, on a plurality of components of at least a portion of the pixels, the plurality of components of a single pixel contained within a vector and the at least one operation comprising at least one vector operation, the processor operable to perform the at least one vector operation on the vector to process the plurality of components of the single pixel in parallel;
• one or more processing pipelines operable to process the graphics data;
• first circuitry operable to operate on graphics data corresponding to a present set of pixels while the DMA engine transfers graphics data corresponding to a future set of pixels;
• and
• second circuitry operable to transfer data from the external memory to the one or more processing pipelines by directing data to the one or more pipelines.