Industrial controller using shared memory multicore architecture

An industrial controller comprising:

• a multicore electronic computer having a first processor, a second processor, a first cache, and a second cache, wherein the first cache corresponds to the first processor and the second cache corresponds to the second processor;
• a dedicated communication interface between and accessible only by the first processor and the second processor;
• a shared electronic memory communicating with the first and second processors through their respective memory caches, the shared electronic memory including executable industrial control logic for controlling a machine in real-time by reading input signals from sensors on the machine to provide output signals to actuators on the machine according to the control logic;
• a microcoder executable by at least one of the first and second processors and configured to interpret instructions associated with network communication between the first and second processor and to execute the instruction using the dedicated communication interface;
• and
• a steering, circuit for monitoring memory access attempts of the first cache by the first processor, wherein the steering circuit determines whether each memory access attempt corresponds to a predefined portion of the shared electronic memory and when the memory access attempt corresponds to the predefined portion of the shared electronic memory, the steering circuit connects the first processor to the second cache, and wherein the first processor interrupts execution of the second processor via the dedicated communication interface prior to initiating a memory access attempt within the predefined portion of the shared electronic memory and the first processor restarts execution of the second processor via the dedicated communication interface after the first processor accesses the second cache.