Methods and systems for high bandwidth chip-to-chip communications interface

An apparatus comprising:

• a set of four wires for carrying signals associated with a vector signaling code;
• a set of three comparator circuits, each comparator circuit connected to all four wires of the set of four wires, and each comparator circuit having a two-input comparator providing a comparison output;
• each comparator circuit of the set of comparator circuits further comprising two adder circuits, each adder circuit connected to an input of the respective two-input comparator, and each adder circuit is connected to a globally unique pair of wires selected from the set of four wires.

A method comprising:

• receiving at an integrated circuit device a vector signaling code word comprising symbols selected from an alphabet of three or more values;
• detecting the at least one vector signaling code word by at least one comparison of a sum of physical signals on two selected wires and a sum of physical signals on a remaining two wires;
• wherein each detection comparison represents one bit of a received binary data word corresponding to a transmitted data word, the received binary data word being output for use by the receiving integrated circuit device.