Interpolation circuit and receiving circuit
AssigneeFujitsu Limited
InventorTakushi Hashida
Life of this patent
Estimating the term…
Abstract
An interpolation circuit includes: a first circuit that generates first interpolation data from a plurality of pieces of data among data inputted in time series; a second circuit that generates second interpolation data from the plurality of pieces of data in timing when a part of the data inputted in time series in the first circuit lacks; and a third circuit that adds the second interpolation data to a location in the first interpolation data where the part of the data inputted in time series has lacked.
Claims13
An interpolation circuit comprising:
- a first circuit that generates first interpolation data from a plurality of pieces of data among data inputted in time series;
- a second circuit that generates second interpolation data from the plurality of pieces of data in timing when a part of the data inputted in time series in the first circuit lacks;
- and
- a third circuit that adds the second interpolation data to a location in the first interpolation data where the part of the data inputted in time series has lacked,
- a control circuit that changes an interpolation coefficient to be supplied to the first circuit for each given period,
- wherein the first circuit generates the first interpolation data using the interpolation coefficient, the second circuit generates the second interpolation data using an interpolation coefficient different from the interpolation coefficient of the first circuit, and the part of the data lacks in timing is when the interpolation coefficient is changed.
An interpolation circuit comprising:
- a first circuit that generates first interpolation data from a plurality of pieces of data among data inputted in time series;
- a second circuit that generates second interpolation data from the plurality of pieces of data in timing when a part of the data inputted in time series in the first circuit lacks;
- and
- a third circuit that adds the second interpolation data to a location in the first interpolation data where the part of the data inputted in time series has lacked,
- a control circuit that changes an interpolation coefficient to be supplied to the first circuit for each given period,
- wherein:
- the first circuit generates the first interpolation data using the interpolation coefficient, the second circuit generates the second interpolation data using an interpolation coefficient different from the interpolation coefficient of the first circuit,
- the first circuit includes a first capacitor circuit that generates the first interpolation data,
- the second circuit includes a second capacitor circuit that generates the second interpolation data,
- each of the first and the second capacitor circuits includes a first variable capacitor and a second variable capacitor that are capable of changing capacitance values according to the interpolation coefficient, and
- the first interpolation data and the second interpolation data are formed by applying currents corresponding to the plurality of pieces of data to the first and the second variable capacitors in timing when the first variable capacitor is earlier than the second variable capacitor, and synthesizing electric charges of the first and the second variable capacitors.
A receiving circuit, comprising:
- an interpolation circuit including:
- a first circuit that generates first interpolation data from a plurality of pieces of data among data inputted in time series;
- a second circuit that generates second interpolation data from the plurality of pieces of data in timing when a part of the data inputted in time series in the first circuit lacks;
- and
- a third circuit that adds the second interpolation data to a location in the first interpolation data where the part of the data inputted in time series has lacked;
- a control circuit that changes an interpolation coefficient to be supplied to the first circuit for each given period;
- and
- a calculation circuit that calculates an interpolation coefficient based on an output of the third circuit,
- wherein the first circuit generates the first interpolation data using the interpolation coefficient, the second circuit generates the second interpolation data using an interpolation coefficient different from the interpolation coefficient of the first circuit, and the part of the data lacks in timing is when the interpolation coefficient is changed.
A receiving circuit, comprising:
- an interpolation circuit including:
- a first circuit that generates first interpolation data from a plurality of pieces of data among data inputted in time series;
- a second circuit that generates second interpolation data from the plurality of pieces of data in timing when a part of the data inputted in time series in the first circuit lacks;
- and
- a third circuit that adds the second interpolation data to a location in the first interpolation data where the part of the data inputted in time series has lacked;
- a control circuit that changes an interpolation coefficient to be supplied to the first circuit for each given period;
- and
- a calculation circuit that calculates an interpolation coefficient based on an output of the third circuit,
- wherein:
- the first circuit generates the first interpolation data using the interpolation coefficient, the second circuit generates the second interpolation data using an interpolation coefficient different from the interpolation coefficient of the first circuit,
- the first circuit includes a first capacitor circuit that generates the first interpolation data,
- the second circuit includes a second capacitor circuit that generates the second interpolation data,
- each of the first and the second capacitor circuits includes a first variable capacitor and a second variable capacitor that are capable of changing capacitance values according to the interpolation coefficient, and
- the first interpolation data and the second interpolation data are formed by applying currents corresponding to the plurality of pieces of data to the first and the second variable capacitors in timing when the first variable capacitor is earlier than the second variable capacitor, and synthesizing electric charges of the first and the second variable capacitors.
Dependencies are inferred from the claim text.