Phase-locked loop outputs with reduced reference spurs and noise
AssigneeWashington State University
InventorsDeukhyoun Heo, Pawan Agarwal
Life of this patent
Estimating the term…
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AssigneeWashington State University
InventorsDeukhyoun Heo, Pawan Agarwal
Estimating the term…
In some examples, a circuit is described. The circuit may include a voltage-controlled oscillator that may be configured to generate an output signal. The circuit may also include a control signal generation unit that may be configured to generate a control signal based on the output signal. The control signal generation unit may also be configured to provide the control signal to the voltage-controlled oscillator. The voltage-controlled oscillator and the control signal generation unit may be part of a phase-locked loop (PLL) included in the circuit. The circuit may also include a feed-forward network. The feed-forward network may be configured to provide a portion of the control signal to the voltage-controlled oscillator. The voltage-controlled oscillator may generate the output signal based on the control signal from the control signal generation unit and the portion of the control signal from the feed-forward network.
A circuit comprising:
A circuit comprising:
A circuit comprising:
A method to reduce noise in an output of a phase-locked loop, the method comprising:
Dependencies are inferred from the claim text.