2N+1 level voltage inverter

A bidirectional system for converting a direct input voltage into an alternating output voltage comprising at least one phase, the bidirectional system including:

• two input terminals,
• two voltage generators connected in series between the two input terminals and connected to one another by a first middle point,
• an output terminal,
• two switching branches, each of the two switching branches connected between the output terminal and a respective one of the two input terminals, each of the two switching branches comprising N first switching cells connected in series and having one of N−1 intermediate points between adjacent ones of the N first switching cells, N being an integer greater than or equal to 2,
• N−1 pairs of capacitors, a first capacitor of each of the N−1 pairs of capacitors being connected between one of the N−1 intermediate points of a first one of the two switching branches and one of N−1 second middle points, a second capacitor of each of the N−1 pairs of capacitors being connected between one of the N−1 intermediate points of a second one of the two switching branches and one of the N−1 second middle points, the first capacitor of each of the N−1 pairs of capacitors and the second capacitor of each of the N−1 pairs of capacitors being connected to one another by one of the N−1 second middle points,
• N second switching cells, one of the N second switching cells being connected between the output terminal and one of the N−1 second middle points, and each of the other of the N second switching cells being connected between two middle points, the two middle points including at least one of the N−1 second middle points, and
• control means for controlling the N first switching cells and the N second switching cells,
• wherein the control means is capable of controlling the switching of the N first switching cells and the N second switching cells according to a control law, and the control law is such that a current flows, for at least one given value of the alternating output voltage, through a first capacitor of a first pair of the N−1 pairs of capacitors in a first direction during a first phase, then in a second direction opposite the first direction through the first capacitor of the first pair of the N−1 pairs of capacitors during a second phase.