Low temperature deposition method for polycrystalline silicon material for a non-volatile memory device

A method of forming a non-volatile memory device, comprising:

• providing a substrate having a surface region;
• forming a first dielectric material overlying the surface region of the substrate;
• forming a first wiring structure overlying the first dielectric material;
• forming a layer of material comprising a polycrystalline silicon germanium material having a p+ impurity characteristic in electric contact with the first wiring structure, the polycrystalline silicon germanium material having a p+ impurity characteristic being deposited at a first deposition temperature ranging from about 350 Degrees Celsius to about 500 Degrees Celsius;
• forming a polycrystalline silicon material having a p+ impurity characteristic conformally overlying the polycrystalline silicon germanium material having a p+ impurity characteristic at a second deposition temperature ranging from about 350 Degrees Celsius to about 500 Degrees Celsius, wherein the polycrystalline silicon material having the p+ impurity characteristic is epitaxially formed overlying the polycrystalline silicon germanium material having the p+ impurity characteristic substantially-free of an anneal step;
• forming a resistive switching material comprising an amorphous silicon material having an intrinsic semiconductor characteristic overlying the polycrystalline silicon material having the p+ impurity characteristic, wherein the amorphous silicon material is not intentionally doped;
• forming a second conductive material overlying the resistive switching material, the second conductive material being in physical contact and electric contact with the resistive switching material, wherein a resistive switching element if formed from the resistive switching material and the second conductive material;
• and forming a second wiring structure overlying the second conductive material;
• wherein prior to forming the layer of material comprises:
• forming a second dielectric material overlying the first wiring structure;
• forming a via within the second dielectric material exposing a portion of the first wiring structure;
• and forming a first conductive material within the via;
• and wherein forming the layer of material comprises forming the layer of material comprising the polycrystalline silicon germanium having the p+ impurity characteristic in contact with the first conductive material within the via.