Package for an optoelectronic semiconductor component and semiconductor component
AssigneeOSRAM Opto Semiconductors GmbH
InventorsFrank Moellmer, Markus Arzberger, Michael Schwind, Thomas Hoefer
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AssigneeOSRAM Opto Semiconductors GmbH
InventorsFrank Moellmer, Markus Arzberger, Michael Schwind, Thomas Hoefer
Estimating the term…
A package for an optoelectronic semiconductor component is disclosed. The package includes a package body, a first connecting lead and a second connecting lead. The first connecting lead and the second connecting lead each extend in a vertical direction through the package body. A semiconductor component with such a package and a semiconductor chip are also disclosed.
A package for an optoelectronic semiconductor component, the package comprising:
Dependencies are inferred from the claim text.
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Packages: interconnections, e.g. lead-frames, bond wires or solder balls
Characterised by the shape of the housings: can-type, e.g. TO-CAN housings with emission along or parallel to symmetry axis
Fixing laser chips on mounts: by soldering
Arrangements for thermal management: passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active…
About 5 years 3 months of term left · ends 8 Feb 2032 (estimated)
This patent application is a national phase filing under section 371 of PCT/EP2011/065847, filed Sep. 13, 2011, which claims the priority of German patent application 10 2010 046 090.7, filed Sep. 20, 2010, each of which is incorporated herein by reference in its entirety.
The present application relates to a package for an optoelectronic semiconductor component and to a semiconductor component with such a package.
“TO” packages, for example, TO56, TO38 or TO9 packages, are often used for semiconductor laser diodes with waste heat outputs up to the watt range. However, due to their comparatively complicated structure, these metal packages are too costly for consumer market applications.
Further features, configurations and convenient aspects are revealed by the following description of the exemplary embodiments in conjunction with the figures, in which:
FIGS. 1A to 1C show a first exemplary embodiment of a semiconductor component with a package in schematic plan view (FIG. 1A) and, in FIGS. 1B and 1C, in two side views from directions perpendicular to one another;
FIGS. 2A to 2C show a second exemplary embodiment of a semiconductor component with a package in schematic plan view (FIG. 2A) and, in FIGS. 2B and 2C, in two side views from directions perpendicular to one another;
Identical, similar or identically acting elements are provided with the same reference numerals in the figures.
The figures and the size ratios of the elements illustrated in the figures relative to one another are not to be regarded as being to scale. Rather, individual elements may be illustrated on an exaggeratedly large scale for greater ease of depiction and/or better comprehension.
A first exemplary embodiment of a semiconductor component 10 with a package 1 and a semiconductor chip 6 fastened to the chip is illustrated schematically in FIGS. 1A to 1C. The package 1 comprises a package body 2, a first connecting lead 31 and a second connecting lead 32. The connecting leads form a lead frame for the package. The package body 2 has a first major face 21 and a second major face 22, between which the package body 2 extends in the vertical direction.