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AssigneeKabushiki Kaisha Toshiba
InventorsHiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
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A semiconductor light-emitting device includes: a laminated structure, a first electrode, a second electrode and a dielectric laminated film. The laminated structure includes, a first semiconductor layer, a second semiconductor layer, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, in which the second semiconductor layer and the light-emitting layer are selectively removed and a part of the first semiconductor layer is exposed to a first main surface on the side of the second semiconductor layer. The first electrode is provided on the first main surface of the laminated structure and connected to the first semiconductor layer and has a first region including a first metal film provided on the first semiconductor layer of the first main surface, and a second region including a second metal film provided on the first semiconductor layer and having a higher reflectance for light emitted from the light-emitting layer than the first metal film and having a higher contact resistance with respect to the first semiconductor layer than the first metal film. The second electrode is provided on the first main surface of the laminated structure and connected to the second semiconductor layer. The dielectric laminated film is provided on the first and second semiconductor layer being not covered with the first and second electrode and has a plurality of dielectric films having different refractive indices being laminated.
A semiconductor light-emitting device comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Constructional details: coatings, e.g. passivation layers or antireflective coatings
Bodies: having quantum effect structures or superlattices, e.g. tunnel junctions
Having quantum effect structures or superlattices, e.g. tunnel junctions: within the light-emitting regions, e.g. having quantum confinement…
Characterised by their shape, e.g. curved or truncated substrates: of the light-emitting regions, e.g. non-planar junctions
About 4 years 6 months of term left · ends 20 Apr 2031 (estimated)
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2008-220143, filed on Aug. 28, 2008; the entire contents of which are incorporated herein by reference.
This invention relates to a semiconductor light-emitting device and a method for manufacturing the same.
Light generated in a semiconductor light-emitting device such as LED (Light Emitting Diode) is directly taken out of the device, or taken out from a device surface or a substrate surface or a side surface of the device by repeating reflection inside the semiconductor light-emitting device such as a reflection film, an interface between a semiconductor layer and a substrate, or an interface between a substrate and ambient air. Some of the light inside the device is absorbed by an n-side electrode having low reflection efficiency, and some of the light taken out of the device is absorbed by a mount material or the like, and these are factors of lowering the light extraction efficiency.
FIGS. 1A and 1B are schematic views illustrating the configuration of a semiconductor light-emitting device according to a first embodiment of the invention;
FIGS. 2A and 2B are schematic cross-sectional views illustrating the configuration of a semiconductor light-emitting device of comparative example;
FIG. 3 is a schematic plan view showing a modified example of the semiconductor light-emitting device according to the first embodiment of the invention;
Hereinafter, embodiments of the invention will be described with reference to drawings.
The drawings are schematic or conceptual, and a relation between a thickness and a width of each of parts or a ratio coefficient of sizes of parts or the like is not necessarily the same as the real one. Moreover, even if the same part is shown, occasionally, each of the sizes or the ratio coefficient is shown to be different according to the drawings.
Moreover, in this specification and each of the drawings, the same numerals are appended to the same components as described above with respect to a previous figure, and the detailed description thereof will be appropriately omitted.