Bulk finFET with controlled fin height and high-k liner

A semiconductor device comprising:

• a semiconductor substrate of a first semiconductor material;
• a plurality of punch through doped semiconductor structures in contact with the semiconductor substrate, in which adjacent punch through doped semiconductor structures are separated from one another by a dielectric isolation material, wherein the dielectric isolation material comprises a layered structure of an oxide layer that is in contact with the semiconductor substrate and a high-k dielectric layer that is present on the oxide layer;
• a plurality of fin structures of a second semiconductor material, wherein each fin structure of the plurality of fin structures is present on a punch through doped semiconductor structure of the plurality of punch through doped semiconductor structures, wherein said each fin structure of the plurality of fin structures has a substantially same height as measured from the surface of the semiconductor substrate;
• and
• a gate structure present on a channel portion of said each fin structure of the plurality of fin structures.

A semiconductor device comprising:

• a semiconductor substrate of a first semiconductor material;
• a plurality of punch through doped semiconductor structures in contact with the semiconductor substrate, in which adjacent punch through doped semiconductor structures are separated from one another by a dielectric isolation material;
• a plurality of fin structures of a second semiconductor material, wherein each fin structure of the plurality of fin structures is present on a punch through doped semiconductor structure of the plurality of punch through doped semiconductor structures, wherein said each fin structure of the plurality of fin structures has a substantially same height as measured from the surface of the semiconductor substrate, and wherein each of the punch through doped semiconductor structure of the plurality of punch through doped semiconductor structures is doped with carbon or is doped to have an opposite conductivity type than source and drain regions that are present on opposing sides of the channel portion for each fin structure of the plurality of fin structures;
• and
• a gate structure present on a channel portion of said each fin structure of the plurality of fin structures.