DMOS transistor having an increased breakdown voltage and method for production
AssigneesX-Fab Semiconductor Foundries AG, Texas Instruments Incorporated
InventorsRalf Lerner, Phil Hower, Gabriel Kittler, Klaus Schottmann
Life of this patent
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Abstract
A depletion type DMOS transistor comprises a gap in electrode material allowing incorporation of a well dopant species into the underlying semiconductor material. During subsequent dopant diffusion a continuous well region is obtained having an extended lateral extension without having an increased depth. The source dopant species is implanted after masking the gap. Additional channel implantation is performed prior to forming the gate dielectric material.
Claims15
A depletion mode DMOS transistor comprising:
- a gate electrode structure (22a) formed on a semiconductor material (2, 1) and comprising a gate dielectric layer (3) and an electrode (22), the electrode comprising a first electrode portion (22b) and a second electrode portion (22c) laterally separated by an insulating material (7);
- a source region (6) of a first conductivity type formed in the semiconductor material (2) partially below the first electrode portion (22b);
- an additionally doped channel region (9,21) of the first conductivity type connecting to the source region (6) and extending below the first and second electrode portions (22b, 22c) along a current flow direction (9a), the additionally doped channel region (9,21) vertically overlapping with the first and second electrode portions (22b, 22c);
- a well region (25) of a second conductivity type formed in the semiconductor material (2) so as to be in contact with the source region (6);
- the additionally doped channel region (9,21) establishing a conductive path in the absence of a gate voltage from said source region to a drift region (2) being of the first conductivity type;
- the well region (25) extending laterally below the first and second electrode portions (22b, 22c);
- and
- a drain region (1) of the first conductivity type provided in contact with the drift region (2).
A semiconductor device including a depletion mode DMOS transistor, the semiconductor device comprising:
- a gate electrode structure on a semiconductor material and comprising a gate dielectric material and an electrode, said electrode comprising a gap between first and second electrode portions of the electrode;
- a source region of a first conductivity type in said semiconductor material and extending partially below said gate electrode structure;
- a channel region comprising an additional channel region of said first conductivity type in said semiconductor material and extending below said gate electrode structure and said gap from said source region to a drift region of said first conductivity type, said additional channel region vertically overlapping with said gap;
- and
- a drain region connecting to said drift region.
A depletion mode DMOS transistor comprising:
- a gate electrode structure formed on a semiconductor material and comprising a gate dielectric layer and an electrode, the electrode comprising a first electrode portion and a second electrode portion laterally separated by an insulating material;
- a source region of a first conductivity type formed in the semiconductor material partially below the first electrode portion;
- an additionally doped channel region of the first conductivity type connecting to the source region and extending below the first and second electrode portions along a current flow direction, the additionally doped channel region laterally overlapping the first and second electrode portions;
- a well region of a second conductivity type formed in the semiconductor material so as to be in contact with the source region;
- the additional channel region forming a conductive path in the absence of a gate voltage with a drift region being of the first conductivity type;
- the well region extending laterally below the first and second electrode portions;
- and
- a drain region of the first conductivity type provided in contact with the drift region.
Dependencies are inferred from the claim text.