Semiconductor process

#1. Field of the Invention

#The present invention relates generally to a semiconductor process, and more particularly, to a semiconductor process that forms at least a recess in a fin-shaped structure beside a gate structure with light spacer pull down.

#2. Description of the Prior Art

#FIG. 1 through FIG. 10 illustrate a semiconductor process according to an exemplary embodiment of the present invention.

#To provide a better understanding of the present invention, preferred exemplary embodiments will be described in detail. The preferred exemplary embodiments of the present invention are illustrated in the accompanying drawings with numbered elements.

#Please refer to FIG. 1 through FIG. 10, which illustrate a semiconductor process according to an exemplary embodiment of the present invention. As shown in FIG. 1, a substrate 100 is provided, and the substrate 100 is a bulk substrate such as a silicon substrate, an epitaxial silicon substrate, a silicon germanium substrate, a silicon carbide substrate or a substrate made of semiconductor material, but is not limited thereto. A mask layer (not shown) is formed on the substrate, wherein the mask layer includes a pad oxide layer (not shown) and a nitride layer (not shown) located on the pad oxide layer. A photolithography process is first performed to pattern the mask layer for forming a patterned pad oxide layer (not shown) and a patterned nitride layer (not shown) and exposing a part of the substrate 100. Then, an etching process can be performed on the substrate 100 by using the patterned pad oxide layer and the patterned nitride layer as a hard mask, so that at least a fin-shaped structure 102 can be formed from the part of the substrate 100 that is not etched, in other words, the formed fin-shaped structure 102 is still covered by the patterned pad oxide layer and the patterned nitride layer. In another exemplary embodiment, an epitaxial process is performed to form the desired fin-shaped structures on the exposed part of the substrate 100, and the formed fin-shaped structure may protrude from the patterned pad oxide layer and the patterned nitride layer. Subsequently, the patterned pad oxide layer and the patterned nitride layer are removed. An insulating layer 104 such as an oxide layer is further formed on the substrate 100 except for the substrate 100 where the fin-shaped structure 102 is formed thereon, and the insulating layer 104 may be formed through processes such as a deposition process, a chemical mechanical polishing (CMP) process and an etching back process, to be later used as shallow trench isolation (STI) structure. Accordingly, the fin-shaped structure 102 can be formed on the substrate 100, and the insulating layer 104 can be formed on the substrate 100 except for the substrate 100 where the fin-shaped structure 102 is formed thereon.

#In another exemplary embodiment, as shown in FIG. 2, a substrate 200 as a silicon-on-insulator (SOI) substrate is provided, which includes a silicon substrate 202, a bottom oxide layer 204 located on the silicon substrate 202 and a silicon layer 206 located on the bottom oxide layer 204. The silicon layer 206 is patterned to form a fin-shaped structure 208 and a part of the bottom oxide layer 204 not overlapped by the fin-shaped structures 208 is exposed. The difference between FIG. 1 and FIG. 2 is: the insulating layer 104 formed on the silicon substrate 100 is just located on the substrate 100 except for the region where the fin-shaped structure 102 is formed thereon (as shown in FIG. 1), but the bottom oxide layer 204 formed in the silicon-on-insulator substrate 200 has the fin-shaped structure 208 located thereon. However, the difference does not affect later semiconductor processes of the present invention. The embodiments illustrated above only serve as examples. The fin-shaped structure in the present invention can have a variety of embodiments, which are not described for the sake of simplicity. The following description is based on a single fin-shaped structure 102 of the embodiment shown in FIG. 1, but the semiconductor process of the present invention can also be applied to a substrate having the fin-shaped structure 208 or a plurality of fin-shaped structures.