Method of forming a single metal that performs N and P work functions in high-K/metal gate devices

A device comprising:

• a first gate structure disposed over a semiconductor substrate, the first gate structure including:
• a high-k dielectric material layer;
• a first metal layer disposed over the high-k dielectric material layer of the first gate structure, wherein the first metal layer has a first conductivity type;
• and
• a conductive layer disposed over the first metal layer;
• and
• a second gate structure disposed over the semiconductor substrate, the second gate structure including:
• the high-k dielectric material layer;
• a second metal layer disposed over the high-k dielectric material layer of the second gate structure, wherein the second metal layer has a second conductivity type that is opposite the first conductivity type, wherein the second metal layer has a top surface facing away from the semiconductor substrate and an opposing bottom surface facing the semiconductor substrate, wherein a thickness of the second metal layer is measured from the bottom surface to the top surface of the second metal layer, wherein the second metal layer includes a first region extending from the bottom surface of the second metal layer toward the top surface of the second metal layer that includes a metal material selected from the group consisting of Ta, Zn, Ti, Nb, Al, Ag, Mn, Zr, Hf, or La, wherein the first region is free of carbon, nitrogen, and silicon, wherein the second metal layer includes a second region extending from the first region toward the top surface that includes the selected metal material and at least silicon and carbon and one of nitrogen and oxygen, wherein the first region extends away from the bottom surface by at least 10% of the thickness of the second metal layer;
• and
• the conductive layer disposed over the second metal layer.

A semiconductor device, comprising:

• a semiconductor substrate having a first region and a second region;
• an isolation structure formed in the substrate for isolating the first region and the second region;
• a first transistor formed in the first region, the first transistor having a first gate structure that includes an interfacial layer, a high-k dielectric layer, and a metal layer including Ta;
• and
• a second transistor formed in the second region, the second transistor having a second gate structure that includes the interfacial layer, the high-k dielectric layer, and the metal layer incorporated with at least two elements, the at least two elements being at least 5 angstrom away from an interface between the high-k dielectric layer and the metal layer, the at least two elements transforming the metal layer from a first-type work function metal to a second type work function metal, and
• wherein the metal layer of the second gate structure has a top surface facing away from the semiconductor substrate and an opposing bottom surface physically contacting the high-k dielectric layer, wherein a thickness of the metal layer of the second gate structure is measured from the bottom surface to the top surface of the metal layer, wherein the metal layer of the second gate structure includes a first region extending from the bottom surface of the metal layer toward a top surface of the metal layer that includes Ta and is free of the at least two elements, wherein the metal layer of the second gate structure includes a second region extending from the first region toward the top surface that includes Ta and the at least two elements, wherein the first region extends away from the bottom surface by at least 10% of the thickness of the metal layer of the second gate structure.