Through-silicon coaxial via structure and method
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsAdam E. Gallegos, Thomas E. Cynkar
Life of this patent
Estimating the term…
Abstract
A silicon interconnect structure includes a peripheral outer via in a silicon substrate, a solid core inner via in the silicon substrate, the solid core inner via coaxial with the peripheral outer via to form a coaxial via structure, a metal interconnect stack formed over a first surface of the peripheral outer via and the solid core inner via, at least portions of the metal interconnect stack forming an electrical connection with the peripheral outer via and the solid core inner via, first contact pads on a surface of the metal interconnect stack, and second contact pads on an exposed surface of the peripheral outer via and the solid core inner via.
Claims20
A silicon interconnect structure, comprising:
- a peripheral outer via in a silicon substrate;
- a solid core inner via in the silicon substrate, the solid core inner via coaxial with the peripheral outer via to form a coaxial via structure;
- a metal interconnect stack formed over a first surface of the peripheral outer via and the solid core inner via, at least portions of the metal interconnect stack forming an electrical connection with the peripheral outer via and the solid core inner via;
- first contact pads on a surface of the metal interconnect stack;
- second contact pads on an exposed surface of the peripheral outer via and the solid core inner via;
- and
- solder bumps and solder micro-bumps, the solder micro-bumps connecting the silicon interconnect structure to an integrated circuit and the solder bumps connecting the silicon interconnect structure to an integrated circuit package substrate.
An integrated circuit package, comprising:
- a package substrate;
- a silicon interposer structure located over the package substrate, the silicon interposer structure comprising:
- a peripheral outer via in a silicon substrate;
- a solid core inner via in the silicon substrate, the solid core inner via coaxial with the peripheral outer via to form a coaxial via structure;
- a metal interconnect stack formed over a first surface of the peripheral outer via and the solid core inner via, at least portions of the metal interconnect stack forming an electrical connection with the peripheral outer via and the solid core inner via;
- first contact pads on a surface of the metal interconnect stack;
- second contact pads on an exposed surface of the peripheral outer via and the solid core inner via;
- and
- solder bumps and solder micro-bumps, the solder micro-bumps connecting the silicon interconnect structure to an integrated circuit and the solder bumps connecting the silicon interconnect structure to an integrated circuit package substrate.
An integrated circuit package, comprising:
- a silicon interposer structure comprising:
- a peripheral outer via in a silicon substrate;
- a solid core inner via in the silicon substrate, the solid core inner via being coaxial with the peripheral outer via to form a coaxial via structure;
- a metal interconnect stack positioned over a first surface of the peripheral outer via and the solid core inner via, where at least some portions of the metal interconnect stack form an electrical connection with the peripheral outer via as well as the solid core inner via;
- solder bumps connecting the silicon interposer structure to an integrated circuit package substrate;
- and
- solder micro-bumps connecting the silicon interposer structure to an integrated circuit.
Dependencies are inferred from the claim text.