Semiconductor device
AssigneeRohm Co., Ltd.
InventorHiroshi Okumura
Life of this patent
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Abstract
A semiconductor device suitable for preventing malfunction is provided. The semiconductor device includes a semiconductor chip 1, a first electrode pad 21 laminated on the semiconductor chip 1, an intermediate layer 4 having a rectangular shape defined by first edges 49a and second edges, and a plurality of bumps 5 arranged to sandwich the intermediate layer 4 by cooperating with the semiconductor chip 1. The first edges 49a extend in the direction x, whereas the second edges extend in the direction y. The plurality of bumps 5 include a first bump 51 electrically connected to the first electrode pad 21 and a second bump 52 electrically connected to the first electrode pad 21. The first bump 51 is arranged at one end in the direction x and one end in the direction y.
Claims23
A semiconductor device comprising:
- a semiconductor chip comprising a semiconductor substrate, a wiring layer formed directly on the semiconductor substrate, and an insulating layer covering the wiring layer;
- a first electrode pad laminated on the insulating layer of the semiconductor chip;
- a second electrode pad laminated on the insulating layer of the semiconductor chip;
- an intermediate layer having a rectangular shape defined by a first edge and a second edge;
- and
- a plurality of bumps arranged to sandwich the intermediate layer by cooperating with the semiconductor chip;
- wherein the first edge extends in a first direction crossing a thickness direction of the semiconductor chip, the second edge extends in a second direction crossing both of the thickness direction and the first direction, the plurality of bumps include a first bump electrically connected to the first electrode pad, the plurality of bumps include a second bump electrically connected to the first electrode pad via the second electrode pad, and the first bump is arranged at one end in the first direction and one end in the second direction, and
- wherein both the first electrode pad and the second electrode pad are electronically connected to the wiring layer of the semiconductor chip, and
- wherein the first bump and the second bump are placed along and adjacent to the first edge of the intermediate layer.
Dependencies are inferred from the claim text.