Peripheral electrical connection of package on package

A semiconductor die package, comprising:

• a first semiconductor die with a first device region and a first through sidewall via (TsV) formed therein, wherein the first TsV is separated from the device region, and wherein the first TsV is disposed at an edge of the first semiconductor die and has a first end that overlaps the device region and a second end opposite the first end that is laterally displaced from the device region, and that is laterally immediately adjacent a sidewall of the first semiconductor die;
• a first conductive structure formed over the first semiconductor die, wherein the first conductive structure is electrically connected to devices in the first device region and physically contacts the first end of the first TsV of the first semiconductor die;
• a second conductive structure formed over a surface on the opposite side of the first semiconductor die from the first conductive structure, wherein the second conductive structure contacts the second end of the first TsV of the first semiconductor die;
• and
• a second semiconductor die with a second device region and a second through sidewall via (TsV) formed therein, wherein the second TsV is separated from the device region, and wherein the second TsV is disposed at an edge of the second semiconductor die.

A semiconductor die package, comprising:

• a first semiconductor die with a first device region and a first through sidewall via (TsV) formed therein, wherein the first TsV is separated from the device region, and wherein the first TsV is disposed at an edge of the first semiconductor die;
• a first conductive structure formed over the first semiconductor die, wherein the first conductive structure is electrically connected to devices in the first device region and physically contacts a first end of the first TsV of the first semiconductor die;
• a second conductive structure formed over a surface on the opposite side of the first semiconductor die from the first conductive structure, wherein the second conductive structure contacts a second end of the first TsV of the first semiconductor die;
• a second semiconductor die with a second device region and a second through sidewall via (TsV) formed therein, wherein the second TsV is separated from the device region, and wherein the second TsV is disposed at an edge of the second semiconductor die;
• and
• a second redistribution structure over the second conductive structure of the first semiconductor die and a fourth conductive structure of the second semiconductor die.